TC74AC573FW Description
It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. These 8-bit D-type latches are controlled by a latch enable input (LE) and a output enable input ( OE ). When the OE input is high, the eight outputs are in a high impedance state.
TC74AC573FW Key Features
- High speed: tpd = 6.0 ns (typ.) at VCC = 5 V
- Low power dissipation: ICC = 8 µA (max) at Ta = 25°C
- High noise immunity: VNIH = VNIL = 28% VCC (min)
- Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
- Balanced propagation delays: tpLH ∼- tpHL
- Wide operating voltage range: VCC (opr) = 2 to 5.5 V
- Pin and function patible with 74F573