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TC74LCX157FK - Low Voltage Quad 2-Channel Multiplexer

Download the TC74LCX157FK datasheet PDF. This datasheet also covers the TC74LCX157F variant, as both devices belong to the same low voltage quad 2-channel multiplexer family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • Low-voltage operation: VCC = 1.65 to 3.6 V.
  • High-speed operation: tpd = 5.8 ns (max) (VCC = 3.0 to 3.6 V).
  • Ouput current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V).
  • Latch-up performance: >±500 mA.
  • Available in JEITA SOP, VSSOP (US).
  • Power-down protection provided on all inputs and outputs.
  • Pin and function compatible with the 74 series (74AC/VHC/HC/F/ALS/LS etc. ) 157 type TC74LCX157F TC74LCX157FK Weight SOP16-P-300-1.27A VSSOP16-P-003.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74LCX157F_ToshibaSemiconductor.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number TC74LCX157FK
Manufacturer Toshiba
File Size 309.58 KB
Description Low Voltage Quad 2-Channel Multiplexer
Datasheet download datasheet TC74LCX157FK Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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TC74LCX157F/FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LCX157F, TC74LCX157FK Low Voltage Quad 2-Channel Multiplexer with 5 V Tolerant Inputs and Outputs The TC74LCX157 is a high-performance CMOS multiplexer. Designed for use in 3.3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is designed for low-voltage (3.3 V) VCC applications, but it could be used to interface to 5-V supply environment for inputs. It consists of four 2-input digital multiplexers with common SELECT and ST inputs. When the ST input is held “H” level, selection of data is inhibited and all the outputs become “L” level. The SELECT decoding determines whether the A or B inputs get routed to their corresponding Y outputs.