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Toshiba Electronic Components Datasheet

TC74LCX373FK Datasheet

Low-Voltage Octal D-Type Latch

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TC74LCX373F/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX373F, TC74LCX373FK
Low-Voltage Octal D-Type Latch with 5-V Tolerant Inputs and Outputs
The TC74LCX373 is a high-performance CMOS octal D-type latch.
Designed for use in 3.3-V systems, it achieves high-speed operation
while maintaining the CMOS low power dissipation.
The device is designed for low-voltage (3.3 V) VCC applications, but it
could be used to interface to 5-V supply environment for both inputs and
outputs.
This 8 bit D-type latch is controlled by a latch enable input (LE) and
an output enable input ( OE ). When the OE input is high, the eight
outputs are in a high-impedance state.
All inputs are equipped with protection circuits against static
discharge.
Features
Low-voltage operation: VCC = 1.65 V to 3.6 V
High-speed operation: tpd = 8.0 ns (max) (VCC = 3.0 to 3.6 V)
Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
Latch-up performance: ±500 mA
Available in JEITA SOP, VSSOP (US)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 373 type
TC74LCX373F
TC74LCX373FK
Weight
SOP20-P-300-1.27A
VSSOP20-P-0030-0.50
: 0.22 g ( typ.)
: 0.03 g ( typ.)
Note: The Electrical Characteristics of VCC = 1.8 ± 0.15 V is only applicable for products which manufactured
from January 2009 onward.
© 2018
1
Toshiba Electronic Devices & Storage Corporation
Start of commercial production
1994-10
2018-08-02


Toshiba Electronic Components Datasheet

TC74LCX373FK Datasheet

Low-Voltage Octal D-Type Latch

No Preview Available !

Pin Assignment (top view)
IEC Logic Symbol
TC74LCX373F/FK
1
Q0 2
D0 3
D1 4
Q1 5
Q2 6
D2 7
D3 8
Q3 9
GND 10
20 VCC
19 Q7
18 D7
17 D6
16 Q6
15 Q5
14 D5
13 D4
12 Q4
11 LE
1
EN
LE 11
C1
D0 3
1D
D1 4
7
D2
D3 8
D4 13
D5 14
17
D6
18
D7
2
Q0
5
Q1
6
Q2
9
Q3
12 Q4
15 Q5
16
Q6
19
Q7
Truth Table
Inputs
OE
LE
D
H
X
X
L
L
X
L
H
L
L
H
H
Outputs
Z
Qn
L
H
X: Don’t care
Z: High impedance
Qn: Q outputs are latched at the time when the LE input is taken to a low logic level.
System Diagram
D0
3
D
D1
4
D
D2
7
D
D3
8
D
D4
13
D
D5
14
D
D6
17
D
D7
18
D
11
LE
1
L
L
L
L
L
L
L
L
2
5
6
9
12
15
16
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
© 2018
2
Toshiba Electronic Devices & Storage Corporation
2018-08-02


Part Number TC74LCX373FK
Description Low-Voltage Octal D-Type Latch
Maker Toshiba Semiconductor
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TC74LCX373FK Datasheet PDF






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