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Toshiba Electronic Components Datasheet

TC74LCX573FT Datasheet

LOW VOLTAGE OCTAL D-TYPE LATCH WITH 5V TOLERANT INPUTS AND OUTPUTS

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TC74LCX573F/FW/FT
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX573F,TC74LCX573FW,TC74LCX573FT
Low-Voltage Octal D-Type Latch with 5-V Tolerant Inputs and Outputs
The TC74LCX573F/FW/FT is a high-performance CMOS octal
D-type latch. Designed for use in 3.3-V systems, it achieves
high-speed operation while maintaining the CMOS low power
dissipation.
The device is designed for low-voltage (3.3 V) VCC applications,
but it could be used to interface to 5-V supply environment for
both inputs and outputs.
This 8-bit D-type latch is controlled by a latch enable input
(LE) and an output enable input (OE).
When the OE input is high, the eight outputs are in a
high-impedance state.
All inputs are equipped with protection circuits against static
discharge.
Note: xxxFW (JEDEC SOP) is not available in
Japan.
TC74LCX573F
TC74LCX573FW
Features
· Low-voltage operation: VCC = 2.0 to 3.6 V
· High-speed operation: tpd = 8.0 ns (max) (VCC = 3.0 to 3.6 V)
· Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
· Latch-up performance: ±500 mA
www.DataSheet4U.com· Available in JEDEC SOP, JEITA SOP and TSSOP
TC74LCX573FT
· Power-down protection provided on all inputs and outputs
· Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 573 type
Weight
SOP20-P-300-1.27: 0.22 g (typ.)
SOL20-P-300-1.27: 0.46 g (typ.)
TSSOP20-P-0044-0.65: 0.08 g (typ.)
DataSheet4 U .com
1 2002-01-11
www.DataSheet4U.com


Toshiba Electronic Components Datasheet

TC74LCX573FT Datasheet

LOW VOLTAGE OCTAL D-TYPE LATCH WITH 5V TOLERANT INPUTS AND OUTPUTS

No Preview Available !

www.DataSheet4U.com
Pin Assignment (top view)
OE 1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
TC74LCX573F/FW/FT
IEC Logic Symbol
(1)
OE
(11)
LE
EN
C1
(2)
D0
(3)
D1
(4)
D2
(5)
D3
(6)
D4
(7)
D5
(8)
D6
(9)
D7
1D
(19) Q0
(18)
Q1
(17)
Q2
(16)
Q3
(15)
Q4
(14)
Q5
(13)
Q6
(12)
Q7
Truth Table
Inputs
OE LE
D
Outputs
HXX
Z
L LX
Qn
L H wwL w.DaLtaSheet4U.com
L HH
H
X: Don’t care
Z: High impedance
Qn: Q outputs are latched at the time when the LE input is taken to a low logic level.
System Diagram
D0
2
D
D1
3
D
D2
4
D
D3
5
D
D4
6
D
D5
7
D
D6
8
D
D7
9
D
11
LE
1
OE
LQ LQ LQ LQ LQ LQ LQ LQ
19
Q0
18
Q1
17
Q2
16
Q3
15
Q4
14
Q5
13
Q6
12
Q7
DataSheet4 U .com
2 2002-01-11
www.DataSheet4U.com


Part Number TC74LCX573FT
Description LOW VOLTAGE OCTAL D-TYPE LATCH WITH 5V TOLERANT INPUTS AND OUTPUTS
Maker Toshiba Semiconductor
Total Page 10 Pages
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