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TC74LVX573F - Octal D-Type Latch

Features

  • High speed: tpd = 6.4 ns (typ. ) (VCC = 3.3 V).
  • Low-power dissipation: ICC = 4 μA (max) (Ta = 25°C).
  • Input voltage level: VIL = 0.8 V (max) (VCC = 3 V) VIH = 2.0 V (min) (VCC = 3 V).
  • Power-down protection provided on all inputs.
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Low noise: VOLP = 0.8 V (max).
  • Pin and function compatible with 74HC573 TC74LVX573F TC74LVX573FT Weight SOP20-P-300-1.27A TSSOP20-P-0044-0.65A : 0.22 g (t.

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Full PDF Text Transcription (Reference)

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TC74LVX573F/FT TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74LVX573F, TC74LVX573FT Octal D-Type Latch with 3-State Output The TC74LVX573F/ FT is a high-speed CMOS octal latch with 3-state output fabricated with silicon gate CMOS technology. Designed for use in 3-V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. This device is suitable for low-voltage and battery operated systems. This 8 bit D-type latch is controlled by a latch enable input (LE) and an output enable input ( OE ). When the OE input is high, the eight outputs are in a high-impedance state. An input protection circuit ensures that 0 to 5.5V can be applied to the input pins without regard to the supply voltage.
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