* Q0 14 GND 15 Q1 Q2 16 17 MUX Divide Logic ÷2 Output Buffers Group C Group A Group B 1 GND 28 27 S1 S0 Q8 Q7 VDD 18 26 VDD
* Wide frequency range: 33 MHz to 45 MHz 65 MHz to 90 MHz and 130 MHz to 180 MHz
* Output configurations: four outputs at fREF four outputs at 2x fREF t
TQ1090
TriQuint Semiconductor
247.02 KB
11-output configurable clock buffer.
T R I Q U I N T S E M I C O N D U C T O R, I N C . Figure 1. Block Diagram FBIN 11 TQ1090 S1 10 REFCLK S0 9 8 GND 7 GND 6 GND 5 TEST 12.
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