Datasheet Details
| Part number | TA7S20 |
|---|---|
| Manufacturer | Triscend |
| File Size | 1.56 MB |
| Description | Triscend A7S Configurable System-on-Chip Platform |
| Download | TA7S20 Download (PDF) |
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Download the TA7S20 datasheet PDF. This datasheet also includes the TA7S04 variant, as both parts are published together in a single manufacturer document.
| Part number | TA7S20 |
|---|---|
| Manufacturer | Triscend |
| File Size | 1.56 MB |
| Description | Triscend A7S Configurable System-on-Chip Platform |
| Download | TA7S20 Download (PDF) |
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High-performance, 32-bit ARM7TDMI RISC Processor • Popular, industry-standard 32bit RISC processor • Binary and source code compatible with other ARM7/ARM7TDMI variants • Widespread C/C++ compiler, source-level debugger, and RTOS support • Superior code density using the Thumb® instruction set • 54 MIPS (Dhrystone 2.1) at 60 MHz • Low latency, real-time interrupt response • Fast hardware multiplier • 32-bit register bank and ALU • 32-bit addressing ― 4Gbyte linear address • 32-bit barrel shifter • EmbeddedICE™ on-chip debugger ?
Clock Synthesizer Power Control Power-On Reset To external memory Memory Interface Unit SDRAM Controller Static/Flash Interface Selector Selector Selector Selector Selector PIO PIO PIO Local CPU Bus ARM7TDMI 16KBytes ScratchPad SRAM or Trace Buffer Configurable System Logic (CSL) matrix PIO PIO PIO PIO Selector Data Bus PIO Cache * 8K Bytes * 4-way Set Associative * Protection Unit Address Bus CSI Bridge Configurable System Interconnect socket Standard Peripherals 16-input Interrupt Controller 16-bit Timer 16-bit Timer Hardware Breakpoint Unit Four-channel DMA Controller JTAG Interface CSI Bus Arbiter 32-bit Watchdog Timer UART with F
www.DataSheet4U.com Triscend A7S Configurable System-on-Chip Platform ® August, 2002 (Version 1.10) !
Industry’s first complete 32-bit Configurable System-on-Chip (CSoC) • High-performance, low-power consumption, 32-bit RISC processor (ARM7TDMI™) • 8Kbyte mixed instruction/data cache • 16Kbyte internal scratchpad RAM • Next-generation embedded programmable logic architecture (up to 25,600 ASIC gates) • High-performance dedicated internal bus (up to 455Mbytes per second at 60 MHz) • External memory interface supporting Flash, EEPROM, SRAM, and SDRAM • Advanced real-time, in-system debugging capability • Stand-alone operation from a single external memory (code + initialization) • 2.5-volt core with 3.3- or 2.
| Part Number | Description |
|---|---|
| TA7S04 | Triscend A7S Configurable System-on-Chip Platform |