TTS3816B4E Datasheet 2M x 16Bit x 4 Banks synchronous DRAM

Manufacturer: TwinMOS

Overview: M.tec 2M x 16Bit x 4 Banks synchronous DRAM TTS3816B4E GENERAL.

TTS3816B4E 2m x 16bit x 4 banks synchronous dram by TwinMOS - Datasheet Preview

Datasheet Details

Part number	TTS3816B4E
Manufacturer	TwinMOS
File Size	302.99 KB
Description	2M x 16Bit x 4 Banks synchronous DRAM
Download	TTS3816B4E Download (PDF)

General Description

The TTS3816B4E is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 8 x 1,048,576 words by 16 bits, fabricated with M’tec high performance CMOS technology.

Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle.

Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high bandwidth, high performance memory system www.DataSheet4U.com applications.

Key Features

JEDEC standard 3.3V power supply.
LVTTL compatible with multiplexed address.
Four-banks operation.
MRS cycle with address key programs -. CAS latency (2 & 3) -. Burst length (1, 2, 4, 8 & Full page) -. Burst type (Sequential & Interleave).
All inputs are sampled at the positive going edge of the system clock.
Burst read single-bit write operation.
DQM for masking.
Auto & self refresh.
64ms refresh period (4K cycle.

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