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Vishay Intertechnology Electronic Components Datasheet

SiR690DP Datasheet

N-Channel MOSFET

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www.vishay.com
SiR690DP
Vishay Siliconix
N-Channel 200 V (D-S) MOSFET
PowerPAK® SO-8 Single
D
D8
D7
D6
5
6.15 mm
1 5.15 mm
Top View
PRODUCT SUMMARY
VDS (V)
RDS(on) max. () at VGS = 10 V
RDS(on) max. () at VGS = 7.5 V
Qg typ. (nC)
ID (A) g
Configuration
1
2S
3S
4S
G
Bottom View
200
0.0350
0.0390
23.8
34.4
Single
FEATURES
• ThunderFET® technology optimizes balance
of RDS(on), Qg, Qsw and Qoss
• 100 % Rg and UIS tested
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• DC/DC converters
• Primary side switching
• Synchronous rectification
• DC/AC and inverters
• Battery protection
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAK SO-8
SiR690DP-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-source voltage
Gate-source voltage
Continuous drain current (TJ = 150 °C)
Pulsed drain current (t = 100 μs)
Continuous source-drain diode current
Single pulse avalanche current
Single pulse avalanche energy
Maximum power dissipation
Operating junction and storage temperature range
Soldering recommendations (peak temperature) d, e
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
TC = 25 °C
TA = 25 °C
L = 0.1 mH
TC = 25 °C
TC = 70 °C
TA = 25 °C
TA = 70 °C
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
LIMIT
200
± 20
34.4
27.5
8.4 b, c
6.7 b, c
80
60 a
5.6 b, c
30
45
104
66.6
6.25 b, c
4 b, c
-55 to +150
260
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYPICAL
MAXIMUM
UNIT
Maximum junction-to-ambient b, f
Maximum junction-to-case (Drain)
t 10 s
Steady state
RthJA
RthJC
15
0.9
20
°C/W
1.2
Notes
a. Package limited
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 54 °C/W
g. TC = 25 °C
S16-1308-Rev. A, 04-Jul-2016
1
Document Number: 76415
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


Vishay Intertechnology Electronic Components Datasheet

SiR690DP Datasheet

N-Channel MOSFET

No Preview Available !

www.vishay.com
SiR690DP
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
Static
Drain-source breakdown voltage
VDS temperature coefficient
VGS(th) temperature coefficient
Gate-source threshold voltage
Gate-source leakage
Zero gate voltage drain current
On-state drain current a
Drain-source on-state resistance a
Forward transconductance a
Dynamic b
VDS
VDS/TJ
VGS(th)/TJ
VGS(th)
IGSS
IDSS
ID(on)
RDS(on)
gfs
VGS = 0 V, ID = 250 μA
ID = 250 μA
VDS = VGS, ID = 250 μA
VDS = 0 V, VGS = ± 20 V
VDS = 200 V, VGS = 0 V
VDS = 200 V, VGS = 0 V, TJ = 70 °C
VDS 5 V, VGS = 10 V
VGS = 10 V, ID = 20 A
VGS = 7.5 V, ID = 15 A
VDS = 10 V, ID = 20 A
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Ciss
Coss
Crss
Qg
VDS = 100 V, VGS = 0 V, f = 1 MHz
VDS = 100 V, VGS = 10 V, ID = 20 A
Gate-source charge
Gate-drain charge
Output charge
Gate resistance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Drain-Source Body Diode Characteristics
Qgs
Qgd
Qoss
Rg
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
Continuous source-drain diode current
Pulse diode forward current (t = 100 μs)
Body diode voltage
Body diode reverse recovery time
Body diode reverse recovery charge
Reverse recovery fall time
Reverse recovery rise time
IS
ISM
VSD
trr
Qrr
ta
tb
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %
b. Guaranteed by design, not subject to production testing
VDS = 100 V, VGS = 7.5 V, ID = 20 A
VDS = 100 V, VGS = 0 V
f = 1 MHz
VDD = 50 V, RL = 2.5
ID 20 A, VGEN = 10 V, Rg = 1
VDD = 50 V, RL = 2.5
ID 20 A, VGEN = 7.5 V, Rg = 1
TC = 25 °C
IS = 5 A
IF = 20 A, di/dt = 100 A/μs,
TJ = 25 °C
MIN. TYP. MAX. UNIT
200 - - V
- 175 -
mV/°C
- -7.3 -
2 - 4V
-
-
± 100
nA
- -1
μA
- - 10
50 - - A
- 0.0285 0.0350
- 0.0310 0.0390
- 46 -
S
- 1935 -
- 145 -
- 10.5 -
- 31.9 48
- 24.1 37
- 9.5 -
- 7.7 -
- 56.3 85
0.5 1.2 2.4
- 10 20
- 19 38
- 19 38
- 6 12
- 13 26
- 56 110
- 17 34
- 6 12
pF
nC
ns
- - 60
A
- - 100
- 0.78 1.1 V
-
152 304
ns
-
550 1100
nC
- 75 -
ns
- 77 -
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S16-1308-Rev. A, 04-Jul-2016
2
Document Number: 76415
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


Part Number SiR690DP
Description N-Channel MOSFET
Maker Vishay
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SiR690DP Datasheet PDF






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