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Vishay Intertechnology Electronic Components Datasheet

SiSS72DN Datasheet

N-Channel MOSFET

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www.vishay.com
SiSS72DN
Vishay Siliconix
N-Channel 150 V (D-S) MOSFET
PowerPAK® 1212-8S
D
D
D
6
7
5
D
8
3.3 mm
1
Top View
3.3 mm
PRODUCT SUMMARY
VDS (V)
RDS(on) max. () at VGS = 10 V
Qg typ. (nC)
ID (A)
Configuration
1
4
3
S
2
S
S
G
Bottom View
150
0.042
8.5
25.5 a
Single
FEATURES
• TrenchFET® with ThunderFET technology
optimizes balance of RDS(on), Qg, Qsw, and Qoss
• 100 % Rg and UIS tested
• Material categorization:
for definitions of compliance please see
www.vishay.com/doc?99912
APPLICATIONS
• Primary side switching
• Synchronous rectification
• DC/DC converter
• Motor drive control
• Load switch
D
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and halogen-free
PowerPAK 1212-8S
SiSS72DN-T1-GE3
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
Drain-source voltage
Gate-source voltage
TC = 25 °C
Continuous drain current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
TA = 70 °C
Pulsed drain current (t = 100 μs)
Continuous source-drain diode current
TC = 25 °C
TA = 25 °C
Single pulse avalanche current
Single pulse avalanche energy
L = 0.1 mH
TC = 25 °C
Maximum power dissipation
TC = 70 °C
TA = 25 °C
TA = 70 °C
Operating junction and storage temperature range
Soldering recommendations (peak temperature) c
VDS
VGS
ID
IDM
IS
IAS
EAS
PD
TJ, Tstg
LIMIT
150
± 20
25.5
20.4
7 b, c
5.6 b, c
50
54.8
4.2 b, c
20
20
65.8
42.1
5.1 b, c
3.2 b, c
-55 to +150
260
UNIT
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYPICAL
MAXIMUM
UNIT
Maximum junction-to-ambient b
Maximum junction-to-case (drain)
t 10 s
Steady state
RthJA
RthJC
20
1.5
25
°C/W
1.9
Notes
a. TC = 25 °C
b. Surface mounted on 1" x 1" FR4 board
c. t = 10 s
d. See solder profile (www.vishay.com/doc?73257). The PowerPAK 1212-8S is a leadless package. The end of the lead terminal is exposed
copper (not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed
and is not required to ensure adequate bottom side solder interconnection
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components
f. Maximum under steady state conditions is 65 °C/W
S18-0559-Rev. A, 04-Jun-2018
1
Document Number: 78224
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


Vishay Intertechnology Electronic Components Datasheet

SiSS72DN Datasheet

N-Channel MOSFET

No Preview Available !

www.vishay.com
SiSS72DN
Vishay Siliconix
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN. TYP. MAX. UNIT
Static
Drain-source breakdown voltage
VDS temperature coefficient
VGS(th) temperature coefficient
Gate-source threshold voltage
Gate-source leakage
Zero gate voltage drain current
On-state drain current a
Drain-source on-state resistance a
Forward transconductance a
Dynamic b
VDS
VDS/TJ
VGS(th)/TJ
VGS(th)
IGSS
IDSS
ID(on)
RDS(on)
gfs
VGS = 0 V, ID = 250 μA
ID = 250 mA
ID = 250 μA
VDS = VGS, ID = 250 μA
VDS = 0 V, VGS = ± 20 V
VDS = 150 V, VGS = 0 V
VDS = 150 V, VGS = 0 V, TJ = 70 °C
VDS 10 V, VGS = 10 V
VGS = 10 V, ID = 7 A
VDS = 15 V, ID = 7 A
150 -
-V
- 92 -
mV/°C
- -7.1 -
2 - 4V
- - 100 nA
- -1
μA
- - 15
20 -
-A
-
0.035 0.042
- 16 - S
Input capacitance
Output capacitance
Reverse transfer capacitance
Total gate charge
Ciss
Coss
Crss
Qg
VDS = 75 V, VGS = 0 V, f = 1 MHz
VDS = 75 V, VGS = 10 V, ID = 7 A
- 550 -
- 120 - pF
-6-
-
10.85
22
- 8.5 13
Gate-source charge
Gate-drain charge
Output charge
Gate resistance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Drain-Source Body Diode Characteristics
Qgs
Qgd
Qoss
Rg
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
VDS = 75 V, VGS = 7.5 V, ID = 7 A
- 3 - nC
-3-
VDS = 75 V, VGS = 0 V
f = 1 MHz
- 27.7
0.24 1.2
42
2.4
- 18 36
VDD = 75 V, RL = 13.4 , ID 5.6 A,
-
6 12
VGEN = 10 V, Rg = 1
- 30 60
- 9 18
ns
- 20 40
VDD = 75 V, RL = 13.4 , ID 5.6 A,
-
8 16
VGEN = 7.5 V, Rg = 1
- 25 50
- 11 22
Continuous source-drain diode current
Pulse diode forward current
Body diode voltage
Body diode reverse recovery time
Body diode reverse recovery charge
Reverse recovery fall time
Reverse recovery rise time
IS
ISM
VSD
trr
Qrr
ta
tb
TC = 25 °C
IS = 5.6 A, VGS = 0 V
IF = 5.6 A, di/dt = 100 A/μs,
TJ = 25 °C
- - 54.8
A
- - 50
- 0.8 1.2 V
- 60 120 ns
- 133 266 nC
- 50 -
ns
- 10 -
Notes
a. Pulse test; pulse width 300 μs, duty cycle 2 %
b. Guaranteed by design, not subject to production testing
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
S18-0559-Rev. A, 04-Jun-2018
2
Document Number: 78224
For technical questions, contact: pmostechsupport@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000


Part Number SiSS72DN
Description N-Channel MOSFET
Maker Vishay
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