WTK9971 Key Features
- Super high dense cell design for low RDS(ON) RDS(ON)<50mΩ @VGS = 10V RDS(ON)<60mΩ @VGS = 4.5V -Simple Drive Requirement
- Unit V V/ V S nA uA uA mfl
- Static Drain-Source On-Resistance2 Total Gate Charge
- Gate-Source Charge Gate-Drain (“Miller”) Change Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacit