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EDI2DL32256V - 256Kx32 Synchronous Pipline Burst SRAM

Description

The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate.

The device is packaged in a 119 lead, 14mm by 22mm, BGA.

It is available with clock speeds of166, 150 and 133 MHz.

Features

  • s tKHQV times of 3.5, 3.8 and 4.0ns s 166, 150 and 133 MHz clock speed s DSP Memory Solution.
  • Texas Instruments’ TMS320C6201.
  • Texas Instruments’ TMS320C67x s Package:.
  • 119 pin BGA, JEDEC MO-163 s 3.3V Operating Supply Voltage s 3.5ns Output Enable access time s Single Write Control and Output Enable Lines s Single Chip Enable Line s 56% space savings vs. monolithic TQFPs s Multiple VCC and VSS pins s Reduced inductance and capacitance.

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Datasheet Details

Part number EDI2DL32256V
Manufacturer White Electronic
File Size 123.50 KB
Description 256Kx32 Synchronous Pipline Burst SRAM
Datasheet download datasheet EDI2DL32256V Datasheet

Full PDF Text Transcription

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www.DataSheet4U.com EDI2DL32256V 256Kx32 Synchronous Pipline Burst SRAM 3.3V FEATURES s tKHQV times of 3.5, 3.8 and 4.0ns s 166, 150 and 133 MHz clock speed s DSP Memory Solution • Texas Instruments’ TMS320C6201 • Texas Instruments’ TMS320C67x s Package: • 119 pin BGA, JEDEC MO-163 s 3.3V Operating Supply Voltage s 3.5ns Output Enable access time s Single Write Control and Output Enable Lines s Single Chip Enable Line s 56% space savings vs. monolithic TQFPs s Multiple VCC and VSS pins s Reduced inductance and capacitance DESCRIPTION The EDI2DL32256VxxBC is a 3.3V, 256Kx32 Synchronous Pipeline Burst SRAM constructed with two 256Kx16 die mounted on a multi-layer laminate substrate. The device is packaged in a 119 lead, 14mm by 22mm, BGA.
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