W3EG2256M72ASSR-AJD3 - 4GB - 2x256Mx72 DDR SDRAM REGISTERED ECC
W3EG2256M72ASSR-AJD3 Features
* Double-data-rate architecture DDR200, and DDR266:
* JEDEC design speciļ¬cations Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2.5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data