W3EG6464S-JD3 unbuffered equivalent, 512mb - 64mx64 ddr sdram unbuffered.
Double-data-rate architecture DDR200 and DDR266
* JEDEC design specification Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read L.
* This product is under development, is not qualified or characterized and is subject to change without notice.
JD3: 3.
The W3EG6464S is a 64Mx64 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of eight 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle cont.
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