W3EG7264S-D3 unbuffered equivalent, 512mb - 64mx72 ddr sdram unbuffered.
Double-data-rate architecture DDR200, DDR266, DDR333 and DDR400
* JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Pr.
* This product is under development, is not qualified or characterized and is subject to change without notice.
JEDEC .
The W3EG7264S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 184 pin FR4 substrate. Synchronous design allows precise cycle contr.
Image gallery
TAGS
Manufacturer
Related datasheet
Download (Size : 199.36KB)