W3EG7266S-BD4 ecc equivalent, 512mb - 64mx72 ddr sdram unbuffered ecc.
Double-data-rate architecture DDR200, DDR266, DDR300 and DDR400
* JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Pr.
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* VCC = VCCQ = +2.6V ± 0.1V (200MHz) JEDEC standard 200 pin SO-DIMM package
* Package hei.
The W3EG7266S is a 64Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of nine 64Mx8 DDR SDRAMs in 66 pin TSOP packages mounted on a 200 pin FR4 substrate. Synchronous design allows precise cycle contr.
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