White Electronic Designs
128Kx8 MONOLITHIC SRAM, SMD 5962-89598
Access Times of 70, 85, 100ns
Available with Single Chip Selects (EDI88128) or
Dual Chip Selects (EDI88130)
2V Data Retention (LP Versions)
CS# and OE# Functions for Bus Control
TTL Compatible Inputs and Outputs
Fully Static, No Clocks
Organized as 128Kx8
Industrial, Military and Commercial Temperature
Thru-hole and Surface Mount Packages JEDEC
• 32 pin Ceramic DIP, 0.6 mils wide (Package 9)
• 32 lead Ceramic SOJ (Package 140)
Single +5V (±10%) Supply Operation
The EDI88128C is a high speed, high performance,
Monolithic CMOS Static RAM organized as 128Kx8.
The device is also available as EDI88130C with an
additional chip select line (CS2) which will automatically
power down the device when proper logic levels are
The second chip select line (CS2) can be used to provide
system memory security during power down in non-battery
backed up systems and simpliﬁy decoding schemes in
memory banking where large multiple pages of memory
The EDI88128C and the EDI88130C have eight bi-
directional input-output lines to provide simultaneous
access to all bits in a word. An automatic power down
feature permits the on-chip circuitry to enter a very low
standby mode and be brought back into operation at a
speed equal to the address access time.
Low power versions, EDI88128LP and EDI88130LP, offer
a 2V data retention function for battery back-up opperation.
Military product is available compliant to Appendix A of
FIGURE 1 – PIN CONFIGURATION
WE# Write Enable
OE# Output Enable
VCC Power (+5V ±10%)
NC Not Connected
* Pin 30 is NC for 88128 or CS2 for 88130.
White Electronic Designs Corp. reserves the right to change products or speciﬁcations without notice.
1 White Electronic Designs Corporation • (602) 437-1520 •www.whiteedc.com