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W29N02KV Datasheet

2G-BIT 3.3V NAND FLASH MEMORY

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W29N02KVxxAF
W29N02KVxxAF
2G-BIT 3.3V
NAND FLASH MEMORY
Release Date: November 7th, 2018
1 Revision A




Winbond

W29N02KV Datasheet Preview

W29N02KV Datasheet

2G-BIT 3.3V NAND FLASH MEMORY

No Preview Available !

W29N02KVxxAF
Table of Contents
1. GENERAL DESCRIPTION ............................................................................................................7
2. FEATURES ....................................................................................................................................7
3. PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................8
3.1 Pin Assignment 48-pin TSOP1(x8).......................................................................................8
3.2 Pin Assignment 48 ball VFBGA (x8).....................................................................................9
3.3 Pin Assignment 63 ball VFBGA (x8)...................................................................................10
3.4 Pin Descriptions ..................................................................................................................11
4. PIN DESCRITPIONS ...................................................................................................................12
4.1 Chip Enable (#CE) ..............................................................................................................12
4.2 Write Enable (#WE) ............................................................................................................12
4.3 Read Enable (#RE).............................................................................................................12
4.4 Address Latch Enable (ALE) ..............................................................................................12
4.5 Command Latch Enable (CLE)...........................................................................................12
4.6 Write Protect (#WP)............................................................................................................12
4.7 Ready/Busy (RY/#BY) ........................................................................................................12
4.8 Input and Output (I/Ox) .......................................................................................................12
5. BLOCK DIAGRAM .......................................................................................................................13
6. MEMORY ARRAY ORGANIZATION ...........................................................................................14
6.1 Array Organization (x8).......................................................................................................14
7. MODE SELECTION TABLE ........................................................................................................15
8. COMMAND TABLE......................................................................................................................16
9. DEVICE OPERATIONS ...............................................................................................................17
9.1 READ Operation .................................................................................................................17
9.1.1 PAGE READ (00h-30h) ........................................................................................................ 17
9.1.2 TWO PLANE READ (00h-00h-30h) ...................................................................................... 17
9.1.3 RANDOM DATA OUTPUT (05h-E0h)................................................................................... 19
9.1.4 READ ID (90h)...................................................................................................................... 20
9.1.5 READ PARAMETER PAGE (ECh) ....................................................................................... 21
9.1.6 READ STATUS (70h) ........................................................................................................... 23
9.1.7 READ STATUS ENHANCED (78h) ...................................................................................... 25
9.1.8 READ UNIQUE ID (EDh) ...................................................................................................... 26
9.2 PROGRAM Operation ........................................................................................................27
9.2.1 PAGE PROGRAM (80h-10h)................................................................................................ 27
9.2.2 SERIAL DATA INPUT (80h) ................................................................................................. 27
9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 28
9.2.4 TWO PLANE PAGE PROGRAM .......................................................................................... 29
9.3 COPY BACK Operation ......................................................................................................30
9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 30
9.3.2 PROGRAM for COPY BACK (85h-10h)................................................................................ 31
9.3.3 TWO PLANE READ for COPY BACK................................................................................... 32
9.3.4 TWO PLANE PROGRAM for COPY BACK .......................................................................... 32
9.4 BLOCK ERASE Operation..................................................................................................36
9.4.1 BLOCK ERASE (60h-D0h) ................................................................................................... 36
Release Date: November 7th, 2018
2 Revision A


Part Number W29N02KV
Description 2G-BIT 3.3V NAND FLASH MEMORY
Maker Winbond
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