W946432AD sdram equivalent, ddr sdram.
*Double-data-rate
architecture; two data transfers
*Four
*Data
*Burst
*CAS
internal banks for concurrent operation mask (DM) for write data lengths.
The W946432AD is a high-speed CMOS Double Data Rate synchronous dynamic random access memory organized as 512K words x 4 banks x 32 bits. A bidirectional data strobe (DQS) is transmitted externally, along with data, for use in data capture at the rec.
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