Description
The W946432AD is a high-speed CMOS Double Data Rate synchronous dynamic random access memory organized as 512K words x 4 banks x 32 bits.
Features
- Double-data-rate
architecture; two data transfers.
- Four.
- Data.
- Burst.
- CAS
internal banks for concurrent operation mask (DM) for write data lengths: 2, 4, or 8 Latency: 3
per clock cycle.
- Bidirectional,
data strobe (DQS) is transmitted/ received with data, to be used in capturing data at the receiver is edge-aligned with data for READs; center-aligned with data for WRITEs clock inputs (CLK and CLK ).
- DQS.
- AUTO.
- Auto.
W946432AD_Winbond.pdf
