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W9751G8KB Datasheet Preview

W9751G8KB Datasheet

16M x 4-BANKS x 8-BIT DDR2 SDRAM

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W9751G8KB
16M 4 BANKS 8 BIT DDR2 SDRAM
Table of Contents-
1. GENERAL DESCRIPTION ...................................................................................................................4
2. FEATURES ...........................................................................................................................................4
3. KEY PARAMETERS .............................................................................................................................5
4. BALL CONFIGURATION ......................................................................................................................6
5. BALL DESCRIPTION............................................................................................................................7
6. BLOCK DIAGRAM ................................................................................................................................8
7. FUNCTIONAL DESCRIPTION..............................................................................................................9
7.1 Power-up and Initialization Sequence ...................................................................................................9
7.2 Mode Register and Extended Mode Registers Operation ...................................................................10
7.2.1
Mode Register Set Command (MRS)...............................................................................10
7.2.2
Extend Mode Register Set Commands (EMRS) ..............................................................11
7.2.2.1
Extend Mode Register Set Command (1), EMR (1)................................................11
7.2.2.2
DLL Enable/Disable................................................................................................12
7.2.2.3
Extend Mode Register Set Command (2), EMR (2)................................................13
7.2.2.4
Extend Mode Register Set Command (3), EMR (3)................................................14
7.2.3
Off-Chip Driver (OCD) Impedance Adjustment ................................................................15
7.2.3.1
Extended Mode Register for OCD Impedance Adjustment ....................................16
7.2.3.2
OCD Impedance Adjust..........................................................................................16
7.2.3.3
Drive Mode .............................................................................................................17
7.2.4
On-Die Termination (ODT)...............................................................................................18
7.2.5
ODT related timings .........................................................................................................18
7.2.5.1
MRS command to ODT update delay.....................................................................18
7.3 Command Function.............................................................................................................................20
7.3.1
Bank Activate Command..................................................................................................20
7.3.2
Read Command ...............................................................................................................20
7.3.3
Write Command ...............................................................................................................21
7.3.4
Burst Read with Auto-precharge Command.....................................................................21
7.3.5
Burst Write with Auto-precharge Command.....................................................................21
7.3.6
Precharge All Command ..................................................................................................21
7.3.7
Self Refresh Entry Command ..........................................................................................21
7.3.8
Self Refresh Exit Command.............................................................................................22
7.3.9
Refresh Command ...........................................................................................................22
7.3.10
No-Operation Command ..................................................................................................23
7.3.11
Device Deselect Command..............................................................................................23
7.4 Read and Write access modes ...........................................................................................................23
7.4.1
Posted CAS ....................................................................................................................23
7.4.1.1
Examples of posted CAS operation .....................................................................23
7.4.2
Burst mode operation.......................................................................................................24
7.4.3
Burst read mode operation...............................................................................................25
7.4.4
Burst write mode operation ..............................................................................................25
7.4.5
Write data mask ...............................................................................................................26
7.5 Burst Interrupt .....................................................................................................................................26
7.6 Precharge operation............................................................................................................................27
Publication Release Date: Feb. 15, 2012
- 1 - Revision A01




Winbond

W9751G8KB Datasheet Preview

W9751G8KB Datasheet

16M x 4-BANKS x 8-BIT DDR2 SDRAM

No Preview Available !

W9751G8KB
7.6.1
Burst read operation followed by precharge.....................................................................27
7.6.2
Burst write operation followed by precharge ....................................................................27
7.7 Auto-precharge operation ...................................................................................................................27
7.7.1
Burst read with Auto-precharge .......................................................................................28
7.7.2
Burst write with Auto-precharge .......................................................................................28
7.8 Refresh Operation...............................................................................................................................29
7.9 Power Down Mode..............................................................................................................................29
7.9.1
Power Down Entry ...........................................................................................................30
7.9.2
Power Down Exit..............................................................................................................30
7.10 Input clock frequency change during precharge power down .............................................................30
8.
8.1
8.2
8.3
8.4
8.5
OPERATION MODE ...........................................................................................................................31
Command Truth Table ........................................................................................................................31
Clock Enable (CKE) Truth Table for Synchronous Transitions ...........................................................32
Data Mask (DM) Truth Table...............................................................................................................32
Function Truth Table ...........................................................................................................................33
Simplified Stated Diagram...................................................................................................................36
9. ELECTRICAL CHARACTERISTICS ...................................................................................................37
9.1 Absolute Maximum Ratings ................................................................................................................37
9.2 Operating Temperature Condition.......................................................................................................37
9.3 Recommended DC Operating Conditions ...........................................................................................37
9.4 ODT DC Electrical Characteristics ......................................................................................................38
9.5 Input DC Logic Level...........................................................................................................................38
9.6 Input AC Logic Level ...........................................................................................................................38
9.7 Capacitance ........................................................................................................................................39
9.8 Leakage and Output Buffer Characteristics ........................................................................................39
9.9 DC Characteristics ..............................................................................................................................40
9.10 IDD Measurement Test Parameters....................................................................................................42
9.11 AC Characteristics ..............................................................................................................................43
9.11.1
AC Characteristics and Operating Condition for -18 speed grade ...................................43
9.11.2
AC Characteristics and Operating Condition for -25/25I/-3 speed grades........................45
9.12 AC Input Test Conditions ....................................................................................................................66
9.13 Differential Input/Output AC Logic Levels ...........................................................................................66
9.14 AC Overshoot / Undershoot Specification ...........................................................................................67
9.14.1
AC Overshoot / Undershoot Specification for Address and Control Pins: ........................67
9.14.2
AC Overshoot / Undershoot Specification for Clock, Data, Strobe and Mask pins:..........67
10.
10.1
10.2
10.3
10.4
10.5
10.6
10.7
10.8
10.9
10.10
10.11
10.12
TIMING WAVEFORMS .......................................................................................................................68
Command Input Timing.......................................................................................................................68
ODT Timing for Active/Standby Mode .................................................................................................69
ODT Timing for Power Down Mode ....................................................................................................69
ODT Timing mode switch at entering power down mode....................................................................70
ODT Timing mode switch at exiting power down mode ......................................................................71
Data output (read) timing ....................................................................................................................72
Burst read operation: RL=5 (AL=2, CL=3, BL=4) ................................................................................72
Data input (write) timing ......................................................................................................................73
Burst write operation: RL=5 (AL=2, CL=3, WL=4, BL=4) ....................................................................73
Seamless burst read operation: RL = 5 (AL = 2, and CL = 3, BL = 4) .......................................74
Seamless burst write operation: RL = 5 (WL = 4, BL = 4)..........................................................74
Burst read interrupt timing: RL =3 (CL=3, AL=0, BL=8) .............................................................75
Publication Release Date: Feb. 15, 2012
- 2 - Revision A01


Part Number W9751G8KB
Description 16M x 4-BANKS x 8-BIT DDR2 SDRAM
Maker Winbond
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