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Xicor

X24C01A Datasheet Preview

X24C01A Datasheet

Serial E2PROM

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XPr2e4liCm0in1aAry Information
1K
X24C01A
128 x 8 Bit
Serial E2PROM
FEATURES
2.7V to 5.5V Power Supply
Low Power CMOS
—Active Current Less Than 1 mA
—Standby Current Less Than 50 µA
Internally Organized 128 x 8
Self Timed Write Cycle
—Typical Write Cycle Time of 5 ms
2 Wire Serial Interface
—Bidirectional Data Transfer Protocol
Four Byte Page Write Operation
—Minimizes Total Write Time Per Byte
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
New Hardwire – Write Control Function
DESCRIPTION
The X24C01A is a CMOS 1024 bit serial E2PROM,
internally organized 128 x 8. The X24C01A features a
serial interface and software protocol allowing operation
on a simple two wire bus. Three address inputs allow up
to eight devices to share a common two wire bus.
Xicor E2PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years. Available in an eight
pin DIP and SOIC package.
FUNCTIONAL DIAGRAM
(8) VCC
(4) VSS
(7) WC
(5) SDA
START
STOP
LOGIC
START CYCLE
H.V. GENERATION
TIMING
& CONTROL
(6) SCL
(3) A2
(2) A1
(1) A0
SLAVE ADDRESS
REGISTER
+COMPARATOR
CONTROL
LOGIC
LOAD
INC
WORD
ADDRESS
COUNTER
R/W
DOUT
ACK
PIN
XDEC
E2PROM
32x32
YDEC
8
CK DATA REGISTER DOUT
3841 FHD F01
© Xicor, 1991 Patents Pending
3841-1
1 Characteristics subject to change without notice




Xicor

X24C01A Datasheet Preview

X24C01A Datasheet

Serial E2PROM

No Preview Available !

X24C01A
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
SDA is a bidirectional pin used to transfer data into and
out of the device. It is an open drain output and may be
wire-ORed with any number of open drain or open
collector outputs.
An open drain output requires the use of a pull-up
resistor. For selecting typical values, refer to the Guide-
lines for Calculating Typical Values of Bus Pull-Up
Resistors graph.
Address (A0, A1, A2)
The address inputs are used to set the least significant
three bits of the seven bit slave address. These inputs
can be static or actively driven. If used statically they
must be tied to VSS or VCC as appropriate. If actively
driven, they must be driven to VSS or to VCC.
WRITE CONTROL (WC)
The Write Control input controls the ability to write to the
device. When WC is LOW (tied to VSS) the X24C01A will
be enabled to perform write operations. When WC is
HIGH (tied to VCC) the internal high voltage circuitry will
be disabled and all writes will be disabled.
DEVICE OPERATION
The X24C01A supports a bidirectional bus oriented
protocol. The protocol defines any device that sends
data onto the bus as a transmitter, and the receiving
device as the receiver. The device controlling the trans-
fer is a master and the device being controlled is the
slave. The master will always initiate data transfers and
provide the clock for both transmit and receive opera-
tions. Therefore, the X24C01A will be considered a
slave in all applications.
PIN CONFIGURATION
A0
A1
A2
VSS
DIP/SOIC
18
27
X24C01A
36
45
VCC
WC
SCL
SDA
3841 FHD F02
PIN NAMES
Symbol
A0–A2
SDA
SCL
WC
VSS
VCC
Description
Address Inputs
Serial Data
Serial Clock
Write Control
Ground
+5V
3841 PGM T01
Clock and Data Conventions
Data states on the SDA line can change only during SCL
LOW. SDA state changes during SCL HIGH are re-
served for indicating start and stop conditions. Refer to
Figures 1 and 2.
Start Condition
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24C01A continuously monitors the SDA
and SCL lines for the start condition and will not respond
to any command until this condition has been met.
2


Part Number X24C01A
Description Serial E2PROM
Maker Xicor
Total Page 13 Pages
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