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Xicor

X24C44 Datasheet Preview

X24C44 Datasheet

Serial Nonvolatile Static RAM

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APPLICATION NOTES
AVA I L A B L E
AN3 • AN7 • AN8 • AN15 • AN16 • AN25 • AN29
X24C44• AN30 • AN35 • AN36 • AN39 • AN56 • AN69
256 Bit
X24C44
Serial Nonvolatile Static RAM
16 x 16 Bit
FEATURES
Advanced CMOS Version of Xicor’s X2444
16 x 16 Organization
Single 5 Volt Supply
Ideal for use with Single Chip Microcomputers
—Static Timing
—Minimum I/O Interface
—Serial Port Compatible (COPS™, 8051)
—Easily Interfaced to Microcontroller Ports
Software and Hardware Control of Nonvolatile
Functions
Auto Recall on Power-Up
TTL and CMOS Compatible
Low Power Dissipation
—Active Current: 10mA Maximum
—Standby Current: 50µA Maximum
8-Lead PDIP, Cerdip, and 8-Lead SOIC Packages
High Reliability
—Store Cycles: 1,000,000
—Data Retention: 100 Years
DESCRIPTION
The Xicor X24C44 is a serial 256 bit NOVRAM featuring
a static RAM configured 16 x 16, overlaid bit-by-bit with
a nonvolatile E2PROM array. The X24C44 is fabricated
with Xicor’s Advanced CMOS Floating Gate technology.
The Xicor NOVRAM design allows data to be transferred
between the two memory arrays by means of software
commands or external hardware inputs. A store opera-
tion (RAM data to E2PROM) is completed in 5ms or less
and a recall operation (E2PROM data to RAM) is com-
pleted in 2µs or less.
Xicor NOVRAMs are designed for unlimited write opera-
tions to RAM, either from the host or recalls from
E2PROM and a minimum 1,000,000 store operations.
Inherent data retention is specified to be greater than
100 years.
FUNCTIONAL DIAGRAM
NONVOLATILE
E2PROM
ROW
DECODE
STATIC
RAM
256-BIT
CONTROL
LOGIC
RECALL (6)
STORE (7)
CE (1)
DI (3)
SK (2)
INSTRUCTION
REGISTER
INSTRUCTION
DECODE
COLUMN
DECODE
4-BIT
COUNTER
COPS is a trademark of National Semiconductor Corp.
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3832-1.5 6/19/96 T2/C1/D1 NS
1
DO (4)
3832 FHD F01
Characteristics subject to change without notice




Xicor

X24C44 Datasheet Preview

X24C44 Datasheet

Serial Nonvolatile Static RAM

No Preview Available !

X24C44
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be HIGH to enable all read/
write operations. CE must remain HIGH following a
Read or Write command until the data transfer is com-
plete. CE LOW places the X24C44 in the low power
standby mode and resets the instruction register. There-
fore, CE must be brought LOW after the completion of an
operation in order to reset the instruction register in
preparation for the next command.
Serial Clock (SK)
The Serial Clock input is used to clock all data into and
out of the device.
Data In (DI)
Data In is the serial data input.
Data Out (DO)
Data Out is the serial data output. It is in the high
impedance state except during data output cycles in
response to a READ instruction.
STORE
STORE LOW will initiate an internal transfer of data from
RAM to the E2PROM array.
RECALL
RECALL LOW will initiate an internal transfer of data
from E2PROM to the RAM array.
PIN CONFIGURATION
PDIP/CERDIP/SOIC
CE 1
8 VCC
SK 2
7 STORE
X24C44
DI 3
6 RECALL
DO 4
5 VSS
3832 FHD F02.2
PIN NAMES
Symbol
CE
SK
DI
DO
RECALL
STORE
VCC
VSS
Description
Chip Enable
Serial Clock
Serial Data In
Serial Data Out
Recall Input
Store Input
+5V
Ground
3832 PGM T01
2


Part Number X24C44
Description Serial Nonvolatile Static RAM
Maker Xicor
Total Page 15 Pages
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