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X25041 Datasheet Preview

X25041 Datasheet

SPI Serial E2PROM with Block LockTM Protection

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X25041
4K
X25041
512 x 8 Bit
SPI Serial E2PROM with Block LockTM Protection
FEATURES
1MHz Clock Rate
SPI Modes (0,1 & 1,0)
512 X 8 Bits
—4 Byte Page Mode
Low Power CMOS
—150µA Standby Current
—3mA Active Current
2.7V To 5.5V Power Supply
Block Lock Protection
—Protect 1/4, 1/2 or all of E2PROM Array
Built-in Inadvertent Write Protection
—Power-Up/Power-Down protection circuitry
—Write Latch
—Write Protect Pin
Self-Timed Write Cycle
—5ms Write Cycle Time (Typical)
High Reliability
—Endurance: 100,000 cycles per byte
—Data Retention: 100 Years
—ESD protection: 2000V on all pins
8-Lead PDlP Package
8-Lead SOIC Package
DESCRIPTION
The X25041 is a CMOS 4096-bit serial E2PROM, inter-
nally organized as 512 x 8. The X25041 features a Serial
Peripheral Interface (SPI) and software protocol allow-
ing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is con-
trolled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25041 also features two additional inputs that
provide the end user with added flexibility. By asserting
the HOLD input, the X25041 will ignore transitions on its
inputs, thus allowing the host to service higher priority
interrupts. The WP input can be used as a hardwire input
to the X25041 disabling all write attempts, thus providing
a mechanism for limiting end user capability of altering
the memory.
The X25041 utilizes Xicor’s proprietary Direct Write™
cell, providing a minimum endurance of 100,000 cycles
per byte and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM
STATUS
REGISTER
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
WRITE
PROTECT
LOGIC
WRITE
CONTROL
AND
WP TIMING
LOGIC
Direct Write™ and Block Lock™ Protection is a trademark of Xicor, Inc.
©Xicor, Inc. 1995, 1996 Patents Pending
6556-1.2 6/10/96 T6/C1/D0 NS
1
X DECODE
LOGIC
32
32
64
512 BYTE
ARRAY
32 X 32
32 X 32
64 X 32
48
Y DECODE
DATA REGISTER
6556 FHD F01
Characteristics subject to change without notice




Xicor

X25041 Datasheet Preview

X25041 Datasheet

SPI Serial E2PROM with Block LockTM Protection

No Preview Available !

X25041
PIN DESCRIPTIONS
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked out
by the rising edge of the serial clock.
Serial Input (SI)
SI is the serial data input pin. All opcodes, byte ad-
dresses, and data to be written to the memory are input
on this pin. Data is latched by the falling edge of the serial
clock.
Serial Clock (SCK)
The Serial Clock controls the serial bus timing for data
input and output. Opcodes, addresses, or data present
on the SI pin are latched on the falling edge of the clock
input, while data on the SO pin change after the rising
edge of the clock input.
Chip Select (CS)
When CS is HIGH, the X25041 is deselected and the SO
output pin is at high impedance and unless an internal
write operation is underway, the X25041 will be in the
standby power mode. CS LOW enables the X25041,
placing it in the active power mode. It should be noted
that after power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
Write Protect (WP)
When WP is LOW, nonvolatile writes to the X25041 are
disabled, but the part otherwise functions normally.
When WP is held HIGH, all functions, including nonvola-
tile writes operate normally. WP going LOW while CS is
still LOW will interrupt a write to the X25041. If the
internal write cycle has already been initiated, WP going
LOW will have no affect on a write.
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence is
underway, HOLD may be used to pause the serial
communication with the controller without resetting the
serial sequence. To pause, HOLD must be brought LOW
while SCK is HIGH. To resume communication, HOLD is
brought HIGH, again while SCK is HIGH. If the pause
feature is not used, HOLD should be held HIGH at all
times.
PIN CONFIGURATION
CS
SO
WP
VSS
DIP/SOIC
18
27
X25041
36
45
VCC
HOLD
SCK
SI
6556 FHD F02
PIN NAMES
Symbol
CS
SO
SI
SCK
WP
VSS
VCC
HOLD
Description
Chip Select Input
Serial Output
Serial Input
Serial Clock Input
Write Protect Input
Ground
Supply Voltage
Hold Input
6556 PGM T01
2


Part Number X25041
Description SPI Serial E2PROM with Block LockTM Protection
Maker Xicor
Total Page 14 Pages
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