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X84129 Datasheet Preview

X84129 Datasheet

uPort Saver EEPROM

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APPLICATION NOTE
AVAILABLE
AN95 • AN103 • AN107
128K
X84129
µPort Saver EEPROM
MPSEEPROM
FEATURES
• Up to 10MHz data transfer rate at 5V operator
• 25ns Read Access Time
• Direct interface to microprocessors and micro-
controllers
—Eliminates I/O port requirements
—No interface glue logic required
—Eliminates need for parallel to serial converters
• Low power CMOS
—2.5V–5.5V version
—Standby current less than 1µA
—Active current less than 1mA
• Byte or page write capable
—32-byte page write mode
• Typical nonvolatile write cycle time: 2ms
• High reliability
—100,000 endurance cycles
—Guaranteed data retention: 100 years
• Small packages options
—8-lead XBGA package
—14-lead SOIC package
—28-lead TSSOP package
BLOCK DIAGRAM
Ports
Saved
System Connection
µP
µC
DSP
ASIC
RISC
P0/CS
P1/CLK
P2/DI
P3/DO
A15
A0
D7
D0
OE
WE
DESCRIPTION
The µPort Saver memories need no serial ports or
special hardware and connect to the processor mem-
ory bus. Replacing bytewide data memory, the µPort
Saver uses bytewide memory control functions, takes
a fraction of the board space and consumes much less
power. Replacing serial memories, the µPort Saver
provides all the serial benefits, such as low cost, low
power, low voltage, and small package size, while
releasing I/Os for more important uses.
The µPort Saver memory outputs data within 25ns of
an active read signal. This is less than the read access
time of most hosts and provides “no-wait-state” opera-
tion. This prevents bottlenecks on the bus. With rates
to 10MHz, the µPort Saver supplies data faster than
required by most host read cycle specifications. This
eliminates the need for software NOPs.
The µPort Saver memories communicate over one line
of the data bus using a sequence of standard bus read
and write operations. This “bit serial” interface allows
the µPort Saver to work well in 8-bit, 16-bit, 32-bit, and
64-bit systems.
A Write Protect (WP) pin prevents inadvertent writes to
the memory.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
Internal Block Diagram
MPS
WP H.V. Generation
Timing & Control
CE
Command
I/O Decode
OE
and
Control
Logic
WE
X
DEC
EEPROM
Array
16K x 8
Y Decode
Data Register
REV 1.1.2 9/8/00
www.xicor.com
Characteristics subject to change without notice. 1 of 15




Xicor

X84129 Datasheet Preview

X84129 Datasheet

uPort Saver EEPROM

No Preview Available !

X84129
PIN CONFIGURATIONS
8-Lead XBGA: Top View
VCC 1 8 I/O
NC 2 7 CE
WE 3 6 VSS
OE 4 5 WP
X84129Z
14-Lead SOIC
CE 1
14 VCC
I/O 2
13 NC
NC 3
12 NC
NC
NC
4
5
11
X8412910
NC
NC
WP 6
9 OE
VSS 7
8 WE
28-Lead TSSOP
NC 1
28 NC
NC 2
27 NC
CE 3
26 NC
CE 4
25 NC
CE 5
24 VCC
I/O 6 X84129 23 NC
NC 7
22 NC
NC 8
21 NC
NC 9
20 NC
WP 10
19 OE
VSS 11
NC 12
18 WE
17 NC
NC 13
16 NC
NC 14
15 NC
PIN NAMES
Pin Description
I/O Data Input/Output
CE Chip Enable Input
OE Output Enable Input
WE Write Enable Input
WP Write Protect Input
VCC Supply Voltage
VSS Ground
NC No Connect
PACKAGE SELECTION GUIDE
84129
8-Lead XBGA
14-Lead SOIC
28-Lead TSSOP
PIN DESCRIPTIONS
Chip Enable (CE)
The Chip Enable input must be LOW to enable all read/
write operations. When CE is HIGH, the chip is dese-
lected, the I/O pin is in the high impedance state, and
unless a nonvolatile write operation is underway, the
device is in the standby power mode.
Output Enable (OE)
The Output Enable input must be LOW to enable the
output buffer and to read data from the device on the I/
O line.
Write Enable (WE)
The Write Enable input must be LOW to write either
data or command sequences to the device.
Data In/Data Out (I/O)
Data and command sequences are serially written to
or serially read from the device through the I/O pin.
Write Protect (WP)
When the Write Protect input is LOW, nonvolatile writes
to the device are disabled. When WP is HIGH, all func-
tions, including nonvolatile writes, operate normally. If a
nonvolatile write cycle is in progress, WP going LOW
will have no effect on the cycle already underway, but
will inhibit any additional nonvolatile write cycles.
DEVICE OPERATION
The X84129 are serial EEPROMs designed to inter-
face directly with most microprocessor buses. Stan-
dard CE, OE, and WE signals control the read and
write operations, and a single l/O line is used to send
and receive data and commands serially.
Data Timing
Data input on the l/O line is latched on the rising edge
of either WE or CE, whichever occurs first. Data output
on the l/O line is active whenever both OE and CE are
LOW. Care should be taken to ensure that WE and OE
are never both LOW while CE is LOW.
REV 1.1.2 9/8/00
www.xicor.com
Characteristics subject to change without notice. 2 of 15


Part Number X84129
Description uPort Saver EEPROM
Maker Xicor
Total Page 15 Pages
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