XC18V02 Overview
Xilinx introduces the XC18V00 series of in-system programmable configuration PROMs (Figure 1). Devices in this 3.3V family include a 4-megabit, a 2-megabit, a 1-megabit, and a 512-kilobit PROM that provide an easy-touse, cost-effective method for reprogramming and storing Xilinx FPGA configuration bitstreams. When the FPGA is in Master Serial mode, it generates a configuration clock that drives the PROM.
XC18V02 Key Features
- In-System Programmable 3.3V PROMs for Configuration of Xilinx FPGAs
- Endurance of 20,000 Program/Erase Cycles
- Program/Erase Over Full Industrial Voltage and
- IEEE Std 1149.1 Boundary-Scan (JTAG) Support
- JTAG mand Initiation of Standard FPGA
- Simple Interface to the FPGA
- Cascadable for Storing Longer or Multiple Bitstreams
- Low-Power Advanced CMOS FLASH Process
- Dual Configuration Modes
- Serial Slow/Fast Configuration (up to 33 MHz)