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XC2C64 Datasheet - Xilinx

This lends power savings to High-end Communication equipment and speed to battery operated devices

XC2C64 Features

* Industries best 0.18 micron CMOS CPLD - 4.0 ns pin-to-pin logic delays - less than 100 µA standby current consumption - 64 macrocells with up to 1,600 logic gates - Fast input registers - Slew rate control on individual outputs - LVCMOS 1.8V through 3.3V - LVTTL 3.3V Available in multiple

XC2C64 General Description

The CoolRunner-II 64-macrocell device is designed for both high performance and low power applications. This lends power savings to high-end communication equipment and speed to battery operated devices. This device consists of four Function Blocks inter-connected by a low power Advanced Interconnec.

XC2C64 Datasheet (94.23 KB)

Preview of XC2C64 PDF

Datasheet Details

Part number:

XC2C64

Manufacturer:

Xilinx

File Size:

94.23 KB

Description:

This lends power savings to high-end communication equipment and speed to battery operated devices.

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XC2C64 This lends power savings High-end Communication equipment and speed battery operated devices Xilinx

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