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XC2C64 - This lends power savings to High-end Communication equipment and speed to battery operated devices

General Description

The CoolRunner-II 64-macrocell device is designed for both high performance and low power applications.

This lends power savings to high-end communication equipment and speed to battery operated devices.

Key Features

  • Industries best 0.18 micron CMOS CPLD - 4.0 ns pin-to-pin logic delays - less than 100 µA standby current consumption - 64 macrocells with up to 1,600 logic gates - Fast input registers - Slew rate control on individual outputs - LVCMOS 1.8V through 3.3V - LVTTL 3.3V Available in multiple package styles - 44-pin PLCC with 33 user I/O - 44-pin VQFP with 33 user I/O - 56-ball CP (0.05mm) BGA with 45 user I/O - 100-pin VQFP with 64 user I/O Optimized for high performance 1.8V systems - Ul.

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Datasheet Details

Part number XC2C64
Manufacturer Xilinx (now AMD)
File Size 94.23 KB
Description This lends power savings to High-end Communication equipment and speed to battery operated devices
Datasheet download datasheet XC2C64 Datasheet

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Part Number Description
XC2C64A CoolRunner-II CPLD
XC2C128 CoolRunner-II CPLD
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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0 R XC2C64 CoolRunner-II CPLD 0 0 DS092 (v1.0) December 19, 2001 Advance Product Specification Features • Industries best 0.18 micron CMOS CPLD - 4.0 ns pin-to-pin logic delays - less than 100 µA standby current consumption - 64 macrocells with up to 1,600 logic gates - Fast input registers - Slew rate control on individual outputs - LVCMOS 1.8V through 3.3V - LVTTL 3.3V Available in multiple package styles - 44-pin PLCC with 33 user I/O - 44-pin VQFP with 33 user I/O - 56-ball CP (0.05mm) BGA with 45 user I/O - 100-pin VQFP with 64 user I/O Optimized for high performance 1.8V systems - Ultra low power operation - Advanced 0.