XC5210 Overview
Product Obsolete or Under Obsolescence 0 R XC5200 Series Field Programmable Gate Arrays November 5, 1998 (Version 5.2) 0 7 Product Specification.
XC5210 Key Features
- Low-cost, register/latch rich, SRAM based reprogrammable architecture
- 0.5µm three-layer metal CMOS process technology
- 256 to 1936 logic cells (3,000 to 23,000 “gates”)
- Price petitive with Gate Arrays
- System Level Features
- System performance beyond 50 MHz
- 6 levels of interconnect hierarchy
- VersaRing™ I/O Interface for pin-locking
- Dedicated carry logic for high-speed arithmetic functions
- Cascade chain for wide input functions