* Low-cost, register/latch rich, SRAM based reprogrammable architecture - 0.5µm three-layer metal CMOS process technology - 256 to 1936 logic cells (3,000 to 23,000 “gates”) - Price competitive with Gate Arrays
* System Level Features - System performance beyond 50 MHz - 6 levels of
XC5210
Xilinx
568.70 KB
Field programmable gate arrays.
Product Obsolete or Under Obsolescence 0 R XC5200 Series Field Programmable Gate Arrays November 5, 1998 (Version 5.2) 0 7 Product Specificati.
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