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XCR3064XL-10CS48C Datasheet - Xilinx

XCR3064XL 64 Macrocell CPLD

XCR3064XL-10CS48C Features

* Lowest power 64 macrocell CPLD 6.0 ns pin-to-pin logic delays System frequencies up to 145 MHz 64 macrocells with 1,500 usable gates Available in small footprint packages

* 44-pin PLCC (36 user I/O pins) 44-pin VQFP (36 user I/O pin

XCR3064XL-10CS48C General Description

The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of four function blocks provide 1,500 usable gates. Pin-to-pin propagation delays are 6.0 ns with a maximum system frequency of 145 MHz. TotalCMOS Design Te.

XCR3064XL-10CS48C Datasheet (96.12 KB)

Preview of XCR3064XL-10CS48C PDF

Datasheet Details

Part number:

XCR3064XL-10CS48C

Manufacturer:

Xilinx

File Size:

96.12 KB

Description:

Xcr3064xl 64 macrocell cpld.

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TAGS

XCR3064XL-10CS48C XCR3064XL Macrocell CPLD Xilinx

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