XCR3064XL-7PC44I
Description
The XCR3064XL is a 3.3V, 64-macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions
Key Features
- A total of four function blocks provide 1,500 usable gates
- Pin-to-pin propagation delays are 6.0 ns with a maximum system frequency of 145 MHz
- TotalCMOS Design Technique for Fast Zero Power Xilinx offers a TotalCMOS CPLD, both in process technology and design technique
- Xilinx employs a cascade of CMOS gates to implement its sum of products instead of the traditional sense amp approach
- Refer to Figure 1 and Table 1 showing the ICC vs
