YSS922 - 96kHz DIR + Dolby Digital / Pro Logic / DTS decoder + Sub DSP
YAMAHA
Key Features
DIR Block.
Sampling frequency: two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate).
Provides master clock, 256fs, to DAC, ADC and other peripheral devices. The clock output can be controlled with various modes determined by register setting.
Has a pin that indicates the double rate operation.
Every channel status and user data can be read through the microprocessor interface.
Has an output pin for interrupt that is activated b.
Full PDF Text Transcription for YSS922 (Reference)
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YSS922. For precise diagrams, and layout, please refer to the original PDF.
YSS922 AC3D3 OUTLINE 96kHz sampling frequency. Preliminary 96kHz DIR + Dolby Digital / Pro Logic / DTS decoder + Sub DSP YSS922 is one chip LSI consisting of three built-...
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TS decoder + Sub DSP YSS922 is one chip LSI consisting of three built-in blocks : Dolby Digital (AC-3) / Pro Logic & DTS decoder (Main DSP), a programmable sound processing DSP (Sub DSP) and SPDIF receiver (DIR) which can handle up to The Sub DSP is capable of realizing various sound fields, such as virtual surround by down-loading the program and coefficient from outside. FEATURES DIR Block · Sampling frequency: two ranges are available including; 32k to 48kHz (normal rate) and 64k to 96kHz (double rate) · Provides master clock, 256fs, to DAC, ADC and other peripheral devices. The clock output can be controlled with vario
YSS922 Datasheet
