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MT9172 Datasheet Preview

MT9172 Datasheet

Digital Network Interface Circuit

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ISO2-CMOS ST-BUSFAMILY MT9171/72
Digital Subscriber Interface Circuit
Digital Network Interface Circuit
Data Sheet
Features
• Full duplex transmission over a single twisted pair
• Selectable 80 or 160 kbit/s line rate
• Adaptive echo cancellation
• Up to 3 km (9171) and 4 km (9172)
• ISDN compatible (2B+D) data format
• Transparent modem capability
• Frame synchronization and clock extraction
• Zarlink ST-BUS compatible
• Low power (typically 50 mW), single 5 V supply
Applications
• Digital subscriber lines
• High speed data transmission over twisted wires
• Digital PABX line cards and telephone sets
• 80 or 160 kbit/s single chip modem
March 2006
Ordering Information
MT9171/72AE
MT9171/72AN
MT9171/72AP
MT9171/72APR
MT9171/72ANR
MT9171/72AE1
MT9171/72AP1
MT9171/72AN1
MT9171/72APR1
MT9171/72ANR1
22 Pin PDIP
24 Pin SSOP
28 Pin PLCC
28 Pin PLCC
24 Pin SSOP
22 Pin PDIP*
28 Pin PLCC*
24 Pin SSOP*
28 Pin PLCC*
24 Pin SSOP*
*Pb Free Matte Tin
-40°C to +85°C
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Description
The MT9171 (DSIC) and MT9172 (DNIC) are pin for
pin compatible replacements for the MT8971 and
MT8972, respectively. They are multi-function devices
capable of providing high speed, full duplex digital
transmission up to 160 kbit/s over a twisted wire pair.
They use adaptive echo-cancelling techniques and
transfer data in (2B+D) format compatible to the ISDN
basic rate. Several modes of operation allow an easy
interface to digital telecommunication networks
including use as a high speed limited distance modem
DSTi/Di
CDSTi/
CDi
F0/CLD
C4/TCK
F0o/RCK
MS0
MS1
MS2
RegC
DSTo/Do
CDSTo/
CDo
Transmit
Interface
Prescrambler
Scrambler
Differentially
Encoded Biphase
Transmitter
Transmit
Filter &
Line Driver
Control
Register
Transmit
Timing
Master Clock
Phase Locked
Transmit/
Clock
Receive
Timing &
Control Sync Detect
DPLL
Status
Receive
Address
Echo Canceller
Error
Signal Echo Estimate
+
Receive
Filter
VBias
MUX
-1
+2
Receive
Interface
De-
Prescrambler
Descrambler
Differentially
Encoded Biphase
Receiver
VDD VSS VBias VRef
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1999-2006, Zarlink Semiconductor Inc. All Rights Reserved.
LOUT
LOUT
DIS
Precan
LIN
OSC2
OSC1




Zarlink

MT9172 Datasheet Preview

MT9172 Datasheet

Digital Network Interface Circuit

No Preview Available !

MT9171/72
Data Sheet
with data rates up to 160 kbit/s. Both devices function identically but with the DSIC having a shorter maximum loop
reach specification. The generic "DNIC" will be used to reference both devices unless otherwise noted.
The MT9171/72 is fabricated in Zarlink’s ISO2-CMOS process.
LOUT
VBias
VRef
MS2
MS1
MS0
RegC
F0/CLD
CDSTi/CDi
CDSTo/CDo
VSS
1
2
3
4
5
6
7
8
9
10
11
22 VDD
21 LIN
20 TEST
19 LOUT DIS
18 Precan
17 OSC1
16 OSC2
15 C4/TCK
14 F0o/RCK
13 DSTi/Di
12 DSTo/Do
MS2
NC
MS1
MS0
RegC
F0/CLD
NC
5
6
7
8
9
10
11
25 NC
24 LOUT DIS
23 Precan
22 OSC1
21 OSC2
20 NC
19 C4/TCK
22 PIN PDIP
LOUT
VBias
VRef
MS2
MS1
MS0
RegC
NC
F0/CLD
CDSTi/CDi
CDSTo/CDo
VSS
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
24 PIN SSOP
VDD
LIN
TEST
LOUT DIS
Precan
OSC1
NC
OSC2
C4/TCK
F0o/RCK
DSTi/Di
DSTo/Do
28 PIN PLCC
Figure 2 - Pin Connections
Pin Description
Pin #
22 24 28
Name
Description
11
22
33
4,5, 4,5,
66
77
2 LOUT Line Out. Transmit Signal output (Analog). Referenced to VBias.
3 VBias Internal Bias Voltage output. Connect via 0.33 µF decoupling capacitor to VDD.
4 VRef Internal Reference Voltage output. Connect via 0.33 µF decoupling capacitor to
VDD.
5,7, MS2-MS0 Mode Select inputs (Digital). The logic levels present on these pins select the
8 various operating modes for a particular application. See Table 1 for the
operating modes.
9 RegC Regulator Control output (Digital). A 512 kHz clock used for switch mode power
supplies. Unused in MAS/MOD mode and should be left open circuit.
8 9 10 F0/CLD Frame Pulse/C-Channel Load (Digital). In DN mode a 244 ns wide negative
pulse input for the MASTER indicating the start of the active channel times of the
device. Output for the SLAVE indicating the start of the active channel times of
the device. Output in MOD mode providing a pulse indicating the start of the C-
channel.
2
Zarlink Semiconductor Inc.


Part Number MT9172
Description Digital Network Interface Circuit
Maker Zarlink
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MT9172 Datasheet PDF






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