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PDSP16318MC - Complex Accumulator

Description

The PDSP16318 is a Dual 20-bit Adder/Subtractor configured to supprt Complex Arithmetic.

The device may be used with each of the adders allocated to real or imaginary data (e.g.

Complex Conjugation), the entire device allocated to Real or Imaginary Data (e.g.

Features

  • s s s s s s s s s s Full 10MHz Throughout in FFT.

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Datasheet Details

Part number PDSP16318MC
Manufacturer Zarlink Semiconductor
File Size 118.63 KB
Description Complex Accumulator
Datasheet download datasheet PDSP16318MC Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com PDSP16318 MC PDSP16318 MC Complex Accumulator DS3761 ISSUE 2.1 November 1998 The PDSP16318 contains two independent 20-bit Adder/ Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 10MHz throughout in FFT and filter applications. Two PDSP16318s combined with a single PDSP16112A Complex Multiplier provide a complete arithmetic solution for a Radix 2 DIT FFT Butterfly. A new complex Butterfly result can be generated every 100ns allowing 1k complex FTT's to to be executed in 512ยต s.
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