ZL30102 - T1/E1 Stratum 4/4E Redundant System Clock Synchronizer

Zarlink Semiconductor

ZL30102 Datasheet Preview — Preview of ZL30102 PDF

Datasheet Details

Part number	ZL30102
Manufacturer	Zarlink Semiconductor
File Size	553.24 KB
Description	T1/E1 Stratum 4/4E Redundant System Clock Synchronizer
Datasheet	ZL30102_ZarlinkSemiconductor.pdf

ZL30102 Product details

Description

The ZL30102 DS1/E1 Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization for DS1/E1 transmission equipment deploying redundant network clocks.

Features

Synchronizes to clock-and-sync-pair to maintain minimal phase skew between an H.110 primary master clock and a secondary master clock.
Supports Telcordia GR-1244-CORE Stratum 4 and 4E.
Supports ITU-T G.823 and G.824 for 2048 kbit/s and 1544 kbit/s interfaces.
Supports ANSI T1.403 and ETSI ETS 300 011 for ISDN primary rate interfaces.
Simple hardware control interface.
Manual and Automatic hitless reference switching between any combination o.

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Published: Mar 27, 2007 |