ZL30107 Datasheet PDF (GbE Line Card Synchronizer) | Download Zarlink Semiconductor ZL30107

ZL30107 - GbE Line Card Synchronizer

Description

Reference Inputs (LVCMOS, Schmitt Trigger).

These reference inputs are used for synchronizing the PLL.

These pins are internally pulled down to Vss.

Features

Single chip low cost solution for synchronizing an Ethernet PHY to a standard telecom clock Generates an IEEE 802.3 jitter compliant 25 MHz Gigabit Ethernet output clock Supports three modes of operation: Asynchronous Freerun, Synchronous, and Asynchronous Holdover Defaults in Asynchronous Freerun mode In Asynchronous Freerun mode, the DPLL generates an output clock with a frequency accuracy equal to frequency accuracy of the external crystal oscillator (XO) or a lo.

Datasheet Details

Part number	ZL30107
Manufacturer	Zarlink Semiconductor
File Size	211.42 KB
Description	GbE Line Card Synchronizer
Datasheet	ZL30107 Datasheet
Additional preview pages of the ZL30107 datasheet.

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Full PDF Text Transcription

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www.DataSheet4U.com ZL30107 GbE Line Card Synchronizer Shortform Data Sheet March 2007 A full Data Sheet is available to qualified customers. To register, please send an email to TimingandSync@zarlink.com.

Published: Mar 28, 2007 |