54ACT11520 Datasheet | Texas Instruments

ą - pares Two 8-Bit Words - Inputs Are TTL-Voltage patible - Flow-Through Architecture Optimizes PCB Layout - Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise - EPICt (Enhanced-Performance Implanted CMOS) 1-mm Process - 500-mA Typical Latch-Up Immunity at 125°C - The Device Has the Equivalent of 20-kW Pullup Resistors on Q Inputs - Package Options Include Plastic Small- Outline Packages, Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs description These identity parators perform parisons on two 8-bit binary or BCD words. Features include 20-kΩ pullup termination resistors on the Q inputs for analog or switch data and a P = Q...