* AND-gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data. A low at either input inhibits entry of new data and resets the first flip-flop to the low level on the rising edge of the next clock pulse. A high-level input enables the
74ACT11898 Datasheet (96.26 KB)
74ACT11898
96.26 KB
10-bit parallel-out serial shift register.
74ACT11898 10-BIT PARALLEL-OUT SERIAL SHIFT REGISTER Inputs Are TTL-Voltage Compatible AND-Gated (Enable/Disable) Serial Inputs <.
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