high-speed cmos logic 3 to 8-line decoder/demultiplexer.
* Select One of Eight Data Outputs - Active Low for CD74HC137 and CD74HCT137 - Active High for ’HC237 and CD74HCT237
* l/O Port or Memory Selector
* Two En.
Both circuits feature low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low p.
Both circuits have three binary select inputs (A0, A1 and A2) that can be latched by an active High Latch Enable (LE) signal to isolate the outputs from select-input changes. A “Low” LE makes the output transparent to the input and the circuit funct.
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