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SNAS500Q
- MAY 2010
- REVISED MAY 2017
ADC12D1800 12-Bit, Single 3.6 GSPS Ultra High-Speed ADC
1 Device Overview
1.1 Features
- Configurable to Either 3.6 GSPS Interleaved or 1.8 GSPS Dual ADC
- Pin-patible with ADC10D1000/1500 and ADC12D1000/1600
- Internally Terminated, Buffered, Differential Analog Inputs
- Interleaved Timing Automatic and Manual Skew Adjust
- Test Patterns at Output for System Debug
- Programmable 15-bit Gain and 12-bit Plus Sign
Offset
- Programmable tAD Adjust Feature
- 1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs
- AutoSync Feature for Multi-Chip Systems
- Single...
