ADS5546 Datasheet | Texas Instruments

.ti. SLWS183D - NOVEMBER 2005 - REVISED APRIL 2007 14-BIT, 190 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS Features - Maximum Sample Rate: 190 MSPS - 14-Bit Resolution - No Missing Codes - Total Power Dissipation 1.1 W - Internal Sample and Hold - 73.2-dBFS SNR at 70-MHz IF - 87-dBc SFDR at 70-MHz IF, 0 dB gain - Double Data Rate (DDR) LVDS and Parallel CMOS Output Options - Programmable Gain up to 6 dB for SNR/SFDR Trade-Off at High IF - Reduced Power Modes at Lower Sample Rates - Supports input clock amplitude down to 400 mVPP - Clock Duty Cycle Stabilizer - No External Reference Decoupling Required - Internal and External Reference Support - Programmable Output Clock position...