ADS62C17 Datasheet | Texas Instruments

FEATURES - Maximum Sample Rate: 200 MSPS - 11-bit Resolution with No Missing Codes - 90 d Bc SFDR at Fin = 10 MHz - 79.8 d BFS SNR at 125 MHz IF, 20 MHz BW using TI proprietary SNRBoost technology - Total Power 1.1 W at 200 MSPS - 90 d B Cross-talk - Double Data Rate (DDR) LVDS and Parallel CMOS Output Options - Programmable Gain up to 6d B for SNR/SFDR Trade-off - DC Offset Correction - Gain Tuning Capability in Fine Steps (0.001 d B) Allows Channel-to-channel Gain Matching - Supports Input Clock Amplitude Down to 400 m V p-p Differential - Internal and External Reference Support - 64-QFN Package (9 mm × 9 mm) DESCRIPTION ADS62C17 is a dual channel 11-bit, 200 MSPS A/D converter that bines high dynamic performance and low power consumption in a pact 64 QFN package. This makes it well-suited for multi-carrier, wide band-width munications applications. ADS62C17 uses TI-proprietary SNRBoost technology that can be used to overe SNR limitation due to quantization noise for bandwidths less than Nyquist (Fs/2). It includes several useful and monly used digital functions such as ADC offset correction, gain (0 to 6 d B in steps of 0.5 d B) and gain tuning (in fine steps of 0.001 d B). The gain option can be used to improve SFDR performance at lower full-scale input ranges. Using the gain tuning capability, each channel’s gain can be set independently to improve channel-to-channel gain matching. The device also includes a dc offset correction loop that can be used to cancel the ADC offset. Both DDR LVDS (Double Data Rate) and parallel CMOS digital output interfaces are available. It includes internal references while the traditional reference pins and associated decoupling capacitors have been eliminated. Nevertheless, the device can also be driven with an external reference. The device is specified over the industrial temperature range (- 40°C to 85°C). Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of...