Datasheet4U Logo Datasheet4U.com

CD4021B-Q1 - CMOS 8-Stage Static Shift Register

Description

of 'B' Series CMOS Devices" Latch-Up Performance Meets 50 mA per JESD 78, Class I APPLICATIONS Parallel Input/Serial Output Data Queuing Parallel-to-Serial Data Conversion General-Purpose Register D PACKAGE (TOP VIEW) DESCRIPTION CD4021B series types are 8-st

Features

  • 1.
  • Qualified for Automotive.

📥 Download Datasheet

Datasheet preview – CD4021B-Q1

Datasheet Details

Part number CD4021B-Q1
Manufacturer Texas Instruments
File Size 3.77 MB
Description CMOS 8-Stage Static Shift Register
Datasheet download datasheet CD4021B-Q1 Datasheet
Additional preview pages of the CD4021B-Q1 datasheet.

📁 Similar Datasheet

  • CD4021B - CMOS 8-Stage Static Shift Registers (RCA)
  • CD4021BMS - CMOS 8-Stage Static Shift Registers (Intersil Corporation)
  • CD4021A - CMOS 8-Stage Static Shift Registers (RCA)
  • CD40208B - CMOS 4 x 4 Multiport Register (RCA)
  • CD40208BMS - CMOS 4 x 4 Multiport Register (Intersil Corporation)
  • CD4020A - CMOS 14-Stage Ripple Carry Binary Counters (RCA)
  • CD4020B - CMOS RIPPLE-CARRY BINARY COUNTER DIVIDERS (RCA)
  • CD4020BC - 14-Stage/ 12-Stage Ripple Carry Binary Counters (National Semiconductor)
  • CD4020BM - 14-Stage/ 12-Stage Ripple Carry Binary Counters (National Semiconductor)
  • CD4020BMS - CMOS Ripple-Carry Binary Counter/Dividers (Intersil Corporation)
Other Datasheets by Texas Instruments
  • CD4021B - CMOS 8-Stage Static Shift Registers
  • CD4021BE - CMOS 8-Stage Static Shift Registers
  • CD4021BF3A - CMOS 8-Stage Static Shift Registers
  • CD4021BM - CMOS 8-Stage Static Shift Registers
  • CD4021BQ - CMOS 8-Stage Static Shift Register
  • CD4020B - CMOS RIPPLE-CARRY BINARY COUNTER DIVIDERS
  • CD4020BE - CMOS RIPPLE-CARRY BINARY COUNTER DIVIDERS
  • CD4020BF - CMOS RIPPLE-CARRY BINARY COUNTER DIVIDERS

Full PDF Text Transcription

Click to expand full text
CD4021B-Q1 www.ti.com CMOS 8-STAGE STATIC SHIFT REGISTER Check for Samples: CD4021B-Q1 SCHS378 – MARCH 2010 FEATURES 1 • Qualified for Automotive Applications • Medium-Speed Operation: 12-MHz (Typ) Clock Rate at VDD – VSS = 10 V • Fully Static Operation • Eight Master-Slave Flip-Flops Plus Output Buffering and Control Gating • 100% Tested for Quiescent Current at 20 V • Maximum Input Current of 1 µA at 18 V Over Full Package-Temperature Range: 100 nA at 18 V and 25°C • Noise Margin (Full Package-Temperature Range): – 1 V at VDD = 5 V – 2 V at VDD = 10 V – 2.5 V at VDD = 15 V • Standardized Symmetrical Output Characteristics • 5-V, 10-V, and 15-V Parametric Ratings • Meets All Requirements of JEDEC Tentative Standard No.
Published: |