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CD4066BF Datasheet Preview

CD4066BF Datasheet

CMOS Quad Bilateral Switch

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CD4066B
SCHS051H – NOVEMBER 1998 – REVISED FEBRUARY 2020
CD4066B CMOS Quad Bilateral Switch
1 Features
1 15-V Digital or ±7.5-V Peak-to-Peak Switching
• 125-Ω Typical On-State Resistance for
15-V Operation
• Switch On-State Resistance Matched to Within
5 Ω Over 15-V Signal-Input Range
• On-State Resistance Flat Over Full
Peak-to-Peak Signal Range
• High On or Off Output-Voltage Ratio:
80 dB Typical at fis = 10 kHz, RL = 1 kΩ
• High Degree of Linearity: <0.5% Distortion Typical
at fis = 1 kHz, Vis = 5-Vp-p
VDD – VSS 10-V, RL = 10 kΩ
• Extremely Low Off-State Switch Leakage,
Resulting in Very Low Offset Current and High
Effective Off-State Resistance: 10 pA Typical at
VDD – VSS = 10-V, TA = 25°C
• Extremely High Control Input Impedance
(Control Circuit Isolated From Signal Circuit):
1012 Ω Typical
• Low Crosstalk Between Switches: –50 dB Typical
at fis = 8 MHz, RL = 1 kΩ
• Matched Control-Input to Signal-Output
Capacitance: Reduces Output Signal Transients
• Frequency Response,
Switch On = 40 MHz Typical
• 100% Tested for Quiescent Current at 20-V
• 5-V, 10-V, and 15-V Parametric Ratings
2 Applications
• Analog Signal Switching and Multiplexing: Signal
Gating, Modulators, Squelch Controls,
Demodulators, Choppers, Commutating Switches
• Digital Signal Switching and Multiplexing
• Transmission-Gate Logic Implementation
• Analog-to-Digital and Digital-to-Analog
Conversions
• Digital Control of Frequency, Impedance, Phase,
and Analog-Signal Gain
Building Automation
3 Description
The CD4066B device is a quad bilateral switch
intended for the transmission or multiplexing of
analog or digital signals. It is pin-for-pin compatible
with the CD4016B device, but exhibits a much lower
on-state resistance. In addition, the on-state
resistance is relatively constant over the full signal-
input range.
The CD4066B device consists of four bilateral
switches, each with independent controls. Both the p
and the n devices in a given switch are biased on or
off simultaneously by the control signal. As shown in
Figure 17, the well of the n-channel device on each
switch is tied to either the input (when the switch is
on) or to VSS (when the switch is off). This
configuration eliminates the variation of the switch-
transistor threshold voltage with input signal and,
thus, keeps the on-state resistance low over the full
operating-signal range.
The advantages over single-channel switches include
peak input-signal voltage swings equal to the full
supply voltage and more constant on-state
impedance over the input-signal range. However, for
sample-and-hold applications, the CD4016B device is
recommended.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
PDIP (14)
19.30 mm × 6.35 mm
CDIP (14)
19.50 mm × 6.92 mm
CD4066B
SOIC (14)
8.65 mm × 3.91 mm
SOP (14)
10.30 mm × 5.30 mm
TSSOP (14)
5.00 mm × 4.40 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Bidirectional Signal Transmission Via Digital
Control Logic
Control
Switch
In
Vis
CMOS Protection Network
VDD
Control
VC (1)
p
n
n
VSS
p
Out
n
Vos
VSS
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.




etcTI

CD4066BF Datasheet Preview

CD4066BF Datasheet

CMOS Quad Bilateral Switch

No Preview Available !

CD4066B
SCHS051H – NOVEMBER 1998 – REVISED FEBRUARY 2020
www.ti.com
Table of Contents
1 Features .................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configuration and Functions ......................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information .................................................. 4
6.5 Electrical Characteristics........................................... 5
6.6 Switching Characteristics .......................................... 8
6.7 Typical Characteristics .............................................. 9
7 Parameter Measurement Information ................ 10
8 Detailed Description ............................................ 14
8.1 Overview ................................................................. 14
8.2 Functional Block Diagram ....................................... 14
8.3 Feature Description................................................. 14
8.4 Device Functional Modes........................................ 14
9 Application and Implementation ........................ 15
9.1 Application Information............................................ 15
9.2 Typical Application ................................................. 15
10 Power Supply Recommendations ..................... 17
11 Layout................................................................... 17
11.1 Layout Guidelines ................................................. 17
11.2 Layout Example .................................................... 17
12 Device and Documentation Support ................. 18
12.1 Receiving Notification of Documentation Updates 18
12.2 Community Resources.......................................... 18
12.3 Trademarks ........................................................... 18
12.4 Electrostatic Discharge Caution ............................ 18
12.5 Glossary ................................................................ 18
13 Mechanical, Packaging, and Orderable
Information ........................................................... 18
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision G (June 2017) to Revision H
Page
• Added Junction Temperature details to the Absolute Maximum Ratings table...................................................................... 4
Changes from Revision F (March 2017) to Revision G
Page
• Changed From: VSS To: Hi-Z in the SIG OUT/IN column of ................................................................................................ 14
Changes from Revision E (September 2016) to Revision F
Page
• Corrected the ron VDD = 10 V values in the Electrical Characteristics table. .......................................................................... 7
• Corrected the y axis scale in Figure 6 ................................................................................................................................... 9
Changes from Revision D (September 2003) to Revision E
Page
• Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation
section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and
Mechanical, Packaging, and Orderable Information section ................................................................................................. 1
• Deleted Ordering Information table, see POA at the end of the data sheet........................................................................... 1
• Changed values in the Thermal Information table to align with JEDEC standards ............................................................... 4
2
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Copyright © 1998–2020, Texas Instruments Incorporated


Part Number CD4066BF
Description CMOS Quad Bilateral Switch
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