Datasheet Details
| Part number | CD54AC74 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 599.09 KB |
| Description | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
| Datasheet | CD54AC74-etcTI.pdf |
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Overview: CD54AC74, CD74AC74 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET SCHS231D – SEPTEMBER 1998 – REVISED DECEMBER 2002 D AC Types Feature 1.5-V to 5.5-V Operation and Balanced Noise Immunity at 30% of the Supply D Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption D Balanced Propagation Delays D ±24-mA Output Drive Current – Fanout to 15 F Devices D SCR-Latchup-Resistant CMOS Process and Circuit Design D Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015 CD54AC74 . . . F PACKAGE CD74AC74 . . .
| Part number | CD54AC74 |
|---|---|
| Manufacturer | Texas Instruments |
| File Size | 599.09 KB |
| Description | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
| Datasheet | CD54AC74-etcTI.pdf |
|
|
|
/ordering information The ’AC74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs.
When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse.
| Part Number | Description |
|---|---|
| CD54AC00 | QUADRUPLE 2-INPUT POSITIVE-NAND GATES |
| CD54AC02 | QUADRUPLE 2-INPUT POSITIVE-NOR GATES |
| CD54AC04 | Hex Inverters |
| CD54AC05 | HEX INVERTERS |
| CD54AC08 | QUADRUPLE 2-INPUT POSITIVE-AND GATES |
| CD54AC109 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS |
| CD54AC112 | DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS |
| CD54AC138 | 3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS |
| CD54AC139 | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
| CD54AC153 | DUAL 4-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS |