CD54HCT112 Datasheet | Texas Instruments

Features Description - Hysteresis on Clock Inputs for Improved Noise Immunity and Increased Input Rise and Fall Times - Asynchronous Set and Reset - plementary Outputs - Buffered Inputs - TTAyp=ic2a5lof CMAX = 60MHz at VCC = 5V, CL = 15p F, - Fanout (Over Temperature Range) - Standard Outputs - - - 10 LSTTL Loads - Bus Driver Outputs - - . . . 15 LSTTL Loads - Wide Operating Temperature Range . . . -55o C to 125o C - Balanced Propagation Delay and Transition Times - Significant Power Reduction pared to LSTTL Logic ICs - HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V - HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input patibility, Il ≤ 1µA at VOL, VOH Pinout CD54HC112, CD54HCT112 (CERDIP) CD74HC112 (PDIP, SOIC, SOP, TSSOP) CD74HCT112 (PDIP) TOP VIEW The ’HC112 and ’HCT112 utilize silicon-gate CMOS technology to achieve operating speeds equivalent to LSTTL parts. They exhibit the low power consumption of standard CMOS integrated circuits, together with the ability to drive 10 LSTTL loads. These flip-flops have independent J, K, Set, Reset, and Clock inputs and Q and Q outputs. They change state on the negative-going transition of the clock pulse. Set and Reset are acplished asynchronously by low-level inputs. The HCT logic family is functionally as well as pinpatible with the standard LS logic family. . Ordering Information PART NUMBER TEMP. RANGE (o C) PACKAGE CD54HC112F3A -55 to 125 16 Ld CERDIP CD54HCT112F3A -55 to 125 16 Ld...