dual 4-input nand gates.
3 Description
* LSTTL input logic compatible
– VIL(max) = 0.8 V, VIH(min) = 2 V
* CMOS input logic compatible
– II ≤ 1 µA at VOL.
This device contains two independent 4-input NAND gates. Each gate performs the Boolean function Y = A
* B
* C .
* LSTTL input logic compatible
– VIL(max) = 0.8 V, VIH(min) = 2 V
* CMOS input logic compatible
– II ≤ 1 µA at VOL, VOH
* Buffered inputs
* 4.5 V to 5.5 V operation
* Wide operating temperature ran.
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