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CD74HC366M Datasheet Preview

CD74HC366M Datasheet

Three-State Non-Inverting/Inverting

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Data sheet acquired from Harris Semiconductor
SCHS180C
November 1997 - Revised October 2003
CD54/74HC365, CD54/74HCT365,
CD54/74HC366
High Speed CMOS Logic Hex Buffer/Line Driver,
Three-State Non-Inverting and Inverting
[ /Title
(CD74
HC365
,
CD74
HCT36
5,
CD74
HC366
,
CD74
HCT36
6)
/Sub-
ject
(High
Speed
Features
• Buffered Inputs
• High Current Bus Driver Outputs
Typical Propagation Delay
CL = 15pF, TA = 25oC
tPLH,
tPHL
=
8ns
at
VCC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
Description
The ’HC365, ’HCT365, and ’HC366 silicon gate CMOS three-
state buffers are general purpose high-speed non-inverting
and inverting buffers. They have high drive current outputs
which enable high speed operation even when driving large
bus capacitances. These circuits possess the low power
dissipation of CMOS circuitry, yet have speeds comparable to
low power Schottky TTL circuits. Both circuits are capable of
driving up to 15 low power Schottky inputs.
The ’HC365 and ’HCT365 are non-inverting buffers, whereas
the ’HC366 is an inverting buffer. These devices have two
three-state control inputs (OE1 and OE2) which are NORed
together to control all six gates.
The ’HCT365 logic families are speed, function and pin
compatible with the standard LS logic family.
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC365F3A
-55 to 125
16 Ld CERDIP
CD54HC366F3A
-55 to 125
16 Ld CERDIP
CD54HCT365F3A
-55 to 125
16 Ld CERDIP
CD74HC365E
-55 to 125
16 Ld PDIP
CD74HC365M
-55 to 125
16 Ld SOIC
CD74HC365MT
-55 to 125
16 Ld SOIC
CD74HC365M96
-55 to 125
16 Ld SOIC
CD74HC366E
-55 to 125
16 Ld PDIP
CD74HC366M
-55 to 125
16 Ld SOIC
CD74HC366M96
-55 to 125
16 Ld SOIC
CD74HCT365E
-55 to 125
16 Ld PDIP
CD74HCT365M
-55 to 125
16 Ld SOIC
CD74HCT365MT
-55 to 125
16 Ld SOIC
CD74HCT365M96
-55 to 125
16 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and real. The suffix T denotes a small-quantity reel of
250.
Pinout
CD54HC365, CD54HCT365, CD54HC366
(CERDIP)
CD74HC365, CD74HCT365, CD74HC366
(PDIP, SOIC)
TOP VIEW
OE1 1
1A 2
(1Y) 1Y 3
2A 4
(2Y) 2Y 5
3A 6
(3Y) 3Y 7
GND 8
16 VCC
15 OE2
14 6A
13 6Y (6Y)
12 5A
11 5Y (5Y)
10 4A
9 4Y (4Y)
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated
1




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CD74HC366M Datasheet Preview

CD74HC366M Datasheet

Three-State Non-Inverting/Inverting

No Preview Available !

CD54/74HC365, CD54/74HCT365, CD54/74HC366
Functional Diagrams
HC365, HCT365
HC366
1
OE1
1A 2
3
1Y
4
2A
5
2Y
6
3A
7
3Y
8
GND
16
VCC
15
OE2
14
6A
13
6Y
12
5A
11
5Y
10
4A
9
4Y
1
OE1
1A 2
3
1Y
4
2A
5
2Y
6
3A
7
3Y
8
GND
16
VCC
15
OE2
14
6A
13
6Y
12
5A
11
5Y
10
4A
9
4Y
TRUTH TABLE
INPUTS
OUTPUTS
(Y)
OE1 OE2
A
HC/HCT365
HC366
L
L
L
L
H
L
L
H
H
L
X
H
X
Z
Z
H
X
X
Z
Ζ
NOTE:
H = High Voltage Level
L = Low Voltage Level
X = Don’t Care
Z = High Impedance (OFF) State
2


Part Number CD74HC366M
Description Three-State Non-Inverting/Inverting
Maker etcTI
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CD74HC366M Datasheet PDF






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