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CD74HC595E Datasheet Preview

CD74HC595E Datasheet

8-BIT SHIFT REGISTERS

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CD74HC595
8ĆBIT SHIFT REGISTERS
WITH 3ĆSTATE OUTPUT REGISTERS
SCHS353 − JANUARY 2004
D 8-Bit Serial-In, Parallel-Out Shift
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current 3-State Outputs Can Drive Up
To 15 LSTTL Loads
D Low Power Consumption, 80-µA Max ICC
D Typical tpd = 14 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Shift Register Has Direct Clear
description/ordering information
DW, E, M, NS, OR SM PACKAGE
(TOP VIEW)
QB 1
QC 2
QD 3
QE 4
QF 5
QG 6
QH 7
GND 8
16 VCC
15 QA
14 SER
13 OE
12 RCLK
11 SRCLK
10 SRCLR
9 QH
The CD74HC595 device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage
register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift and
storage registers. The shift register has a direct overriding clear (SRCLR) input, serial (SER) input, and serial
output for cascading. When the output-enable (OE) input is high, the outputs are in the high-impedance state.
Both the shift register clock (SRCLK) and storage register clock (RCLK) are positive-edge triggered. If both
clocks are connected together, the shift register always is one clock pulse ahead of the storage register.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − E
Tube of 25
CD74HC595E
CD74HC595E
SOIC − DW
Tube of 40
Reel of 2000
CD74HC595DW
CD74HC595DWR
HC595M
−55°C to 125°C SOIC − M
Tube of 40
Reel of 2500
Reel of 250
CD74HC595M
CD74HC595M96
CD74HC595MT
HC595M
SOP − NS
Reel of 2000 CD74HC595NSR
HC595M
SSOP − SM
Tube of 80
Reel of 2000
CD74HC595SM
CD74HC595SM96
HJ595
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 2004, Texas Instruments Incorporated
1




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CD74HC595E Datasheet Preview

CD74HC595E Datasheet

8-BIT SHIFT REGISTERS

No Preview Available !

CD74HC595
8ĆBIT SHIFT REGISTERS
WITH 3ĆSTATE OUTPUT REGISTERS
SCHS353 − JANUARY 2004
SER
X
X
X
INPUTS
SRCLK SRCLR
X
X
X
X
X
L
RCLK
X
X
X
L
H
X
H
H
X
X
X
X
FUNCTION TABLE
FUNCTION
OE
H Outputs QA−QH are disabled.
L Outputs QA−QH are enabled.
X Shift register is cleared.
X
First stage of the shift register goes low.
Other stages store the data of previous stage, respectively.
X
First stage of the shift register goes high.
Other stages store the data of previous stage, respectively.
X Shift-register data is stored in the storage register.
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265


Part Number CD74HC595E
Description 8-BIT SHIFT REGISTERS
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