CD74HCT20M Overview
LSTTL input logic patible VIL(max) = 0.8 V, VIH(min) = 2 V CMOS input logic patible II ≤ 1 µA at VOL, VOH Buffered inputs 4.5 V to 5.5 V operation Wide operating temperature range: -55°C to +125°C Supports fanout up to 10 LSTTL loads Significant power reduction pared to LSTTL logic ICs 2 Applications This device contains two independent 4-input NAND gates. Each gate performs the Boolean function Y = A B C D in...
CD74HCT20M Key Features
- LSTTL input logic patible
- VIL(max) = 0.8 V, VIH(min) = 2 V
- CMOS input logic patible
- II ≤ 1 µA at VOL, VOH
- Buffered inputs
- 4.5 V to 5.5 V operation
- Wide operating temperature range
- 55°C to +125°C
- Supports fanout up to 10 LSTTL loads
- Significant power reduction pared to LSTTL