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CD74HCT32M Datasheet Preview

CD74HCT32M Datasheet

Quad 2-Input OR Gate

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Data sheet acquired from Harris Semiconductor
SCHS274C
September 1997 - Revised September 2003
CD54HC32, CD74HC32,
CD54HCT32, CD74HCT32
High-Speed CMOS Logic
Quad 2-Input OR Gate
[ /Title
(CD54
HCT32
,
CD74
HC32,
CD74
HCT32
)
/Sub-
ject
(High
Features
Description
Typical Propagation Delay:
CL = 15pF, TA = 25oC
7ns
at
VCC
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
The ’HC32 and ’HCT32 contain four 2-input OR gates in one
package. Logic gates utilize silicon gate CMOS technology
to achieve operating speeds similar to LSTTL gates with the
low power consumption of standard CMOS integrated cir-
cuits. All devices have the ability to drive 10 LSTTL loads.
The HCT logic family is functionally pin compatible with the
standard LS logic family.
Ordering Information
PART NUMBER
CD54HC32F3A
CD54HCT32F3A
CD74HC32E
CD74HC32M
CD74HC32MT
CD74HC32M96
CD74HCT32E
TEMP. RANGE
(oC)
PACKAGE
-55 to 125
14 Ld CERDIP
-55 to 125
14 Ld CERDIP
-55 to 125
14 Ld PDIP
-55 to 125
14 Ld SOIC
-55 to 125
14 Ld SOIC
-55 to 125
14 Ld SOIC
-55 to 125
14 Ld PDIP
CD74HCT32M
-55 to 125
14 Ld SOIC
CD74HCT32MT
-55 to 125
14 Ld SOIC
CD74HCT32M96
-55 to 125
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel
of 250.
Pinout
CD54HC32, CD54HCT32
(CERDIP)
CD74HC32, CD74HCT32
(PDIP, SOIC)
TOP VIEW
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2003, Texas Instruments Incorporated.
1




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CD74HCT32M Datasheet Preview

CD74HCT32M Datasheet

Quad 2-Input OR Gate

No Preview Available !

CD54HC32, CD74HC32, CD54HCT, CD74HCT32
Functional Diagram
1
1A
2
1B
3
1Y
4
2A
5
2B
6
2Y
7
GND
14
VCC
13
4B
12
4A
11
4Y
10
3B
9
3A
8
3Y
TRUTH TABLE
INPUTS
nA
nB
L
L
L
H
H
L
H
H
H = High Voltage Level, L = Low Voltage Level
OUTPUT
nY
L
H
H
H
HC Logic Symbol
HCT Logic Symbol
nA
nA
nY
nY
nB
nB
2


Part Number CD74HCT32M
Description Quad 2-Input OR Gate
Maker etcTI
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CD74HCT32M Datasheet PDF






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