Datasheet Summary
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SCAS839A
- APRIL 2007
- REVISED MAY 2007
2.5-V PHASE-LOCKED-LOOP CLOCK DRIVER
Features
- Spread-Spectrum Clock patible
- Operating Frequency: 60 MHz to 220 MHz
- Low Jitter (Cycle-Cycle): ±60 ps (±40 ps at 200
MHz)
- Low Static Phase Offset: ±50 ps
- Low Jitter (Period): ±60 ps (±30 ps at 200 MHz)
- 1-to-4 Differential Clock Distribution (SSTL2)
- Best in Class for VOX = VDD/2 ±0.1 V
- Operates From Dual 2.6-V or 2.5-V Supplies
- Available in a 28-Pin TSSOP Package
- Consumes < 100-µA Quiescent Current
- External Feedback Pins (FBIN, FBIN) Are Used to Synchronize the Outputs to the Input Clocks
- Meets/Exceeds JEDEC Standard (JESD82-1) For DDRI-200/266/333...